From: stefan.bruens@rwth-aachen.de (Stefan Brüns)
To: linux-arm-kernel@lists.infradead.org
Subject: [RESEND PATCH 2/2] arm64: allwinner: pine64: Enable spi0/spi1
Date: Tue, 29 Aug 2017 22:26:52 +0200 [thread overview]
Message-ID: <20170829202652.5476-3-stefan.bruens@rwth-aachen.de> (raw)
In-Reply-To: <20170829202652.5476-1-stefan.bruens@rwth-aachen.de>
The two spi channels/controllers are available on the PI-2 resp. Euler
connector, enable both. Contrary to the Pi, the A64 SOC only supports
one chip select, so the second chipselect is not available (though
it can be emulated using gpio chipselect).
Signed-off-by: Stefan Br?ns <stefan.bruens@rwth-aachen.de>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index 827168bc22ed..f25274e8b3e0 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -124,6 +124,14 @@
status = "okay";
};
+&spi0 {
+ status = "okay";
+};
+
+&spi1 {
+ status = "okay";
+};
+
/* On Exp and Euler connectors */
&uart0 {
pinctrl-names = "default";
--
2.14.1
next prev parent reply other threads:[~2017-08-29 20:26 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-29 20:26 [RESEND PATCH 0/2] Enable SPI on A64/Pine64 Stefan Brüns
2017-08-29 20:26 ` [RESEND PATCH 1/2] arm64: allwinner: a64: add SPI nodes Stefan Brüns
2017-08-30 14:44 ` Maxime Ripard
2017-08-29 20:26 ` Stefan Brüns [this message]
2017-08-30 14:48 ` [RESEND PATCH 2/2] arm64: allwinner: pine64: Enable spi0/spi1 Maxime Ripard
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