From: ard.biesheuvel@linaro.org (Ard Biesheuvel)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 18/29] arm-soc: tegra: make sleep asm code runtime relocatable
Date: Sun, 3 Sep 2017 13:07:46 +0100 [thread overview]
Message-ID: <20170903120757.14968-19-ard.biesheuvel@linaro.org> (raw)
In-Reply-To: <20170903120757.14968-1-ard.biesheuvel@linaro.org>
The PIE kernel build does not allow absolute references encoded in
movw/movt instruction pairs, so use our mov_l macro instead (which
will still use such a pair unless CONFIG_RELOCATABLE is defined)
Also, avoid 32-bit absolute literals to refer to absolute symbols.
Instead, use a 16 bit reference so that PIE linker cannot get
confused whether the symbol reference is subject to relocation at
runtime.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
arch/arm/mach-tegra/sleep-tegra20.S | 22 ++++++++++++--------
arch/arm/mach-tegra/sleep-tegra30.S | 6 +++---
arch/arm/mach-tegra/sleep.S | 4 ++--
3 files changed, 18 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-tegra/sleep-tegra20.S b/arch/arm/mach-tegra/sleep-tegra20.S
index 5c8e638ee51a..cab95de5c8f1 100644
--- a/arch/arm/mach-tegra/sleep-tegra20.S
+++ b/arch/arm/mach-tegra/sleep-tegra20.S
@@ -99,7 +99,7 @@ ENTRY(tegra20_cpu_shutdown)
cmp r0, #0
reteq lr @ must not be called for CPU 0
mov32 r1, TEGRA_IRAM_RESET_BASE_VIRT
- ldr r2, =__tegra20_cpu1_resettable_status_offset
+ ldrh r2, 0f
mov r12, #CPU_RESETTABLE
strb r12, [r1, r2]
@@ -121,6 +121,7 @@ ENTRY(tegra20_cpu_shutdown)
beq .
ret lr
ENDPROC(tegra20_cpu_shutdown)
+0: .short __tegra20_cpu1_resettable_status_offset
#endif
#ifdef CONFIG_PM_SLEEP
@@ -181,6 +182,9 @@ ENTRY(tegra_pen_unlock)
ret lr
ENDPROC(tegra_pen_unlock)
+.L__tegra20_cpu1_resettable_status_offset:
+ .short __tegra20_cpu1_resettable_status_offset
+
/*
* tegra20_cpu_clear_resettable(void)
*
@@ -189,7 +193,7 @@ ENDPROC(tegra_pen_unlock)
*/
ENTRY(tegra20_cpu_clear_resettable)
mov32 r1, TEGRA_IRAM_RESET_BASE_VIRT
- ldr r2, =__tegra20_cpu1_resettable_status_offset
+ ldrh r2, .L__tegra20_cpu1_resettable_status_offset
mov r12, #CPU_NOT_RESETTABLE
strb r12, [r1, r2]
ret lr
@@ -203,7 +207,7 @@ ENDPROC(tegra20_cpu_clear_resettable)
*/
ENTRY(tegra20_cpu_set_resettable_soon)
mov32 r1, TEGRA_IRAM_RESET_BASE_VIRT
- ldr r2, =__tegra20_cpu1_resettable_status_offset
+ ldrh r2, .L__tegra20_cpu1_resettable_status_offset
mov r12, #CPU_RESETTABLE_SOON
strb r12, [r1, r2]
ret lr
@@ -217,7 +221,7 @@ ENDPROC(tegra20_cpu_set_resettable_soon)
*/
ENTRY(tegra20_cpu_is_resettable_soon)
mov32 r1, TEGRA_IRAM_RESET_BASE_VIRT
- ldr r2, =__tegra20_cpu1_resettable_status_offset
+ ldrh r2, .L__tegra20_cpu1_resettable_status_offset
ldrb r12, [r1, r2]
cmp r12, #CPU_RESETTABLE_SOON
moveq r0, #1
@@ -238,11 +242,11 @@ ENTRY(tegra20_sleep_core_finish)
bl tegra_disable_clean_inv_dcache
mov r0, r4
- mov32 r3, tegra_shut_off_mmu
+ mov_l r3, tegra_shut_off_mmu
add r3, r3, r0
- mov32 r0, tegra20_tear_down_core
- mov32 r1, tegra20_iram_start
+ mov_l r0, tegra20_tear_down_core
+ mov_l r1, tegra20_iram_start
sub r0, r0, r1
mov32 r1, TEGRA_IRAM_LPx_RESUME_AREA
add r0, r0, r1
@@ -265,7 +269,7 @@ ENTRY(tegra20_sleep_cpu_secondary_finish)
bl tegra_disable_clean_inv_dcache
mov32 r0, TEGRA_IRAM_RESET_BASE_VIRT
- ldr r4, =__tegra20_cpu1_resettable_status_offset
+ ldrh r4, .L__tegra20_cpu1_resettable_status_offset
mov r3, #CPU_RESETTABLE
strb r3, [r0, r4]
@@ -284,7 +288,7 @@ ENTRY(tegra20_sleep_cpu_secondary_finish)
bl tegra_pen_lock
mov32 r0, TEGRA_IRAM_RESET_BASE_VIRT
- ldr r4, =__tegra20_cpu1_resettable_status_offset
+ ldrh r4, .L__tegra20_cpu1_resettable_status_offset
mov r3, #CPU_NOT_RESETTABLE
strb r3, [r0, r4]
diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S
index dd4a67dabd91..478b2ca3ef6e 100644
--- a/arch/arm/mach-tegra/sleep-tegra30.S
+++ b/arch/arm/mach-tegra/sleep-tegra30.S
@@ -261,11 +261,11 @@ ENTRY(tegra30_sleep_core_finish)
mov32 r6, TEGRA_FLOW_CTRL_BASE
mov32 r7, TEGRA_TMRUS_BASE
- mov32 r3, tegra_shut_off_mmu
+ mov_l r3, tegra_shut_off_mmu
add r3, r3, r0
- mov32 r0, tegra30_tear_down_core
- mov32 r1, tegra30_iram_start
+ mov_l r0, tegra30_tear_down_core
+ mov_l r1, tegra30_iram_start
sub r0, r0, r1
mov32 r1, TEGRA_IRAM_LPx_RESUME_AREA
add r0, r0, r1
diff --git a/arch/arm/mach-tegra/sleep.S b/arch/arm/mach-tegra/sleep.S
index 5e3496753df1..785df3edc767 100644
--- a/arch/arm/mach-tegra/sleep.S
+++ b/arch/arm/mach-tegra/sleep.S
@@ -101,11 +101,11 @@ ENTRY(tegra_sleep_cpu_finish)
bl tegra_disable_clean_inv_dcache
mov r0, r4
- mov32 r6, tegra_tear_down_cpu
+ mov_l r6, tegra_tear_down_cpu
ldr r1, [r6]
add r1, r1, r0
- mov32 r3, tegra_shut_off_mmu
+ mov_l r3, tegra_shut_off_mmu
add r3, r3, r0
mov r0, r1
--
2.11.0
next prev parent reply other threads:[~2017-09-03 12:07 UTC|newest]
Thread overview: 83+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-03 12:07 [PATCH v2 00/29] implement KASLR for ARM Ard Biesheuvel
2017-09-03 12:07 ` [PATCH v2 01/29] net/core: work around section mismatch warning for ptp_classifier Ard Biesheuvel
2017-09-03 12:07 ` [PATCH v2 02/29] asm-generic: add .data.rel.ro sections to __ro_after_init Ard Biesheuvel
2017-09-04 15:59 ` Nicolas Pitre
2017-09-04 17:09 ` Kees Cook
2017-09-03 12:07 ` [PATCH v2 03/29] ARM: assembler: introduce adr_l, ldr_l and str_l macros Ard Biesheuvel
2017-09-04 16:05 ` Nicolas Pitre
2017-09-03 12:07 ` [PATCH v2 04/29] ARM: head-common.S: use PC-relative insn sequence for __proc_info Ard Biesheuvel
2017-09-04 16:06 ` Nicolas Pitre
2017-09-03 12:07 ` [PATCH v2 05/29] ARM: head-common.S: use PC-relative insn sequence for idmap creation Ard Biesheuvel
2017-09-04 16:08 ` Nicolas Pitre
2017-09-03 12:07 ` [PATCH v2 06/29] ARM: head.S: use PC-relative insn sequence for secondary_data Ard Biesheuvel
2017-09-04 16:09 ` Nicolas Pitre
2017-09-03 12:07 ` [PATCH v2 07/29] ARM: kernel: use relative references for UP/SMP alternatives Ard Biesheuvel
2017-09-04 16:15 ` Nicolas Pitre
2017-09-03 12:07 ` [PATCH v2 08/29] ARM: head: use PC-relative insn sequence for __smp_alt Ard Biesheuvel
2017-09-04 16:19 ` Nicolas Pitre
2017-09-04 16:20 ` Ard Biesheuvel
2017-09-03 12:07 ` [PATCH v2 09/29] ARM: sleep.S: use PC-relative insn sequence for sleep_save_sp/mpidr_hash Ard Biesheuvel
2017-09-04 16:20 ` Nicolas Pitre
2017-09-03 12:07 ` [PATCH v2 10/29] ARM: head.S: use PC-relative insn sequences for __fixup_pv_table Ard Biesheuvel
2017-09-04 16:47 ` Nicolas Pitre
2017-09-03 12:07 ` [PATCH v2 11/29] ARM: head.S: use PC relative insn sequence to calculate PHYS_OFFSET Ard Biesheuvel
2017-09-04 16:50 ` Nicolas Pitre
2017-09-03 12:07 ` [PATCH v2 12/29] ARM: kvm: replace open coded VA->PA calculations with adr_l call Ard Biesheuvel
2017-09-04 16:57 ` Nicolas Pitre
2017-09-03 12:07 ` [PATCH v2 13/29] arm-soc: exynos: replace open coded VA->PA conversions Ard Biesheuvel
2017-09-04 16:59 ` Nicolas Pitre
2017-09-03 12:07 ` [PATCH v2 14/29] arm-soc: mvebu: replace open coded VA->PA conversion Ard Biesheuvel
2017-09-04 17:00 ` Nicolas Pitre
2017-09-03 12:07 ` [PATCH v2 15/29] arm-soc: various: replace open coded VA->PA calculation of pen_release Ard Biesheuvel
2017-09-04 17:01 ` Nicolas Pitre
2017-09-03 12:07 ` [PATCH v2 16/29] ARM: kernel: switch to relative exception tables Ard Biesheuvel
2017-09-04 17:17 ` Nicolas Pitre
2017-09-04 17:30 ` Ard Biesheuvel
2017-09-03 12:07 ` [PATCH v2 17/29] ARM: kernel: use relative phys-to-virt patch tables Ard Biesheuvel
2017-09-04 18:03 ` Nicolas Pitre
2017-09-04 19:09 ` Ard Biesheuvel
2017-09-03 12:07 ` Ard Biesheuvel [this message]
2017-09-03 12:07 ` [PATCH v2 19/29] ARM: kernel: make vmlinux buildable as a PIE executable Ard Biesheuvel
2017-09-04 18:11 ` Nicolas Pitre
2017-09-04 19:10 ` Ard Biesheuvel
2017-09-03 12:07 ` [PATCH v2 20/29] ARM: kernel: use PC-relative symbol references in MMU switch code Ard Biesheuvel
2017-09-04 18:15 ` Nicolas Pitre
2017-09-04 19:14 ` Ard Biesheuvel
2017-09-03 12:07 ` [PATCH v2 21/29] ARM: kernel: use PC relative symbol references in suspend/resume code Ard Biesheuvel
2017-09-04 18:24 ` Nicolas Pitre
2017-09-04 19:17 ` Ard Biesheuvel
2017-09-03 12:07 ` [PATCH v2 22/29] ARM: mm: export default vmalloc base address Ard Biesheuvel
2017-09-04 18:25 ` Nicolas Pitre
2017-09-03 12:07 ` [PATCH v2 23/29] ARM: kernel: refer to swapper_pg_dir via its symbol Ard Biesheuvel
2017-09-04 18:30 ` Nicolas Pitre
2017-09-04 19:26 ` Ard Biesheuvel
2017-09-03 12:07 ` [PATCH v2 24/29] ARM: kernel: implement randomization of the kernel load address Ard Biesheuvel
2017-09-04 18:44 ` Nicolas Pitre
2017-09-04 19:29 ` Ard Biesheuvel
2017-09-03 12:07 ` [PATCH v2 25/29] ARM: decompressor: explicitly map decompressor binary cacheable Ard Biesheuvel
2017-09-04 18:47 ` Nicolas Pitre
2017-09-03 12:07 ` [PATCH v2 26/29] ARM: decompressor: add KASLR support Ard Biesheuvel
2017-09-04 18:53 ` Nicolas Pitre
2017-09-04 19:33 ` Ard Biesheuvel
2017-09-03 12:07 ` [PATCH v2 27/29] efi/libstub: add 'max' parameter to efi_random_alloc() Ard Biesheuvel
2017-09-03 12:07 ` [PATCH v2 28/29] efi/libstub: check for vmalloc= command line argument Ard Biesheuvel
2017-09-03 12:07 ` [PATCH v2 29/29] efi/libstub: arm: implement KASLR Ard Biesheuvel
2017-09-05 16:45 ` [PATCH v2 00/29] implement KASLR for ARM Tony Lindgren
2017-09-05 16:48 ` Ard Biesheuvel
2017-09-05 19:37 ` Tony Lindgren
2017-09-05 19:42 ` Ard Biesheuvel
2017-09-05 21:27 ` Tony Lindgren
2017-09-05 21:31 ` Ard Biesheuvel
2017-09-06 10:40 ` Ard Biesheuvel
2017-09-06 16:22 ` Tony Lindgren
2017-09-06 16:25 ` Ard Biesheuvel
2017-09-06 16:31 ` Tony Lindgren
2017-09-06 16:35 ` Ard Biesheuvel
2017-09-06 17:12 ` Tony Lindgren
2017-09-06 17:30 ` Ard Biesheuvel
2017-09-06 17:53 ` Tony Lindgren
2017-09-06 18:04 ` Ard Biesheuvel
2017-09-06 18:22 ` Tony Lindgren
2017-09-06 18:25 ` Ard Biesheuvel
2017-09-06 20:08 ` Tony Lindgren
2017-09-12 6:51 ` Ard Biesheuvel
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