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* [PATCH] iommu/arm-smmu-v3: Correct COHACC override message
@ 2017-09-25 13:55 Robin Murphy
  2017-09-25 14:19 ` Lorenzo Pieralisi
  0 siblings, 1 reply; 2+ messages in thread
From: Robin Murphy @ 2017-09-25 13:55 UTC (permalink / raw)
  To: linux-arm-kernel

Slightly confusingly, when reporting a mismatch of the ID register
value, we still refer to the IORT COHACC override flag as the
"dma-coherent property" if we booted with ACPI. Update the message
to be firmware-agnostic in line with SMMUv2.

Reported-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
---
 drivers/iommu/arm-smmu-v3.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index 47f52b1ab838..4c63b3cf4eba 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -2523,7 +2523,7 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu)
 	 * register, but warn on mismatch.
 	 */
 	if (!!(reg & IDR0_COHACC) != coherent)
-		dev_warn(smmu->dev, "IDR0.COHACC overridden by dma-coherent property (%s)\n",
+		dev_warn(smmu->dev, "IDR0.COHACC overridden by FW configuration (%s)\n",
 			 coherent ? "true" : "false");
 
 	switch (reg & IDR0_STALL_MODEL_MASK << IDR0_STALL_MODEL_SHIFT) {
-- 
2.13.4.dirty

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2017-09-25 13:55 [PATCH] iommu/arm-smmu-v3: Correct COHACC override message Robin Murphy
2017-09-25 14:19 ` Lorenzo Pieralisi

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