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From: krzk@kernel.org (Krzysztof Kozlowski)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC 2/2] phy: exynos5-usbdrd: remove disable and enable of phy clk
Date: Sun, 8 Oct 2017 17:50:15 +0200	[thread overview]
Message-ID: <20171008155015.252gefhsc4tks7k6@kozik-lap> (raw)
In-Reply-To: <CANAwSgSbHR+e_2wX3i3VoVxPe10mUOoS94uRpvebfUfybaNQ+g@mail.gmail.com>

On Sun, Oct 08, 2017 at 06:11:12PM +0530, Anand Moon wrote:
> Hi Krzysztof,
> 
> On 6 October 2017 at 12:12, Krzysztof Kozlowski <krzk@kernel.org> wrote:
> > On Fri, Oct 6, 2017 at 6:36 AM, Anand Moon <linux.amoon@gmail.com> wrote:
> >> remove the disable and enable of phy clk.
> >> phy clk is needed to tune the phy controller.
> >
> > Drivers should in general enable and disable the clocks they use. Just
> > like in patch #1 please describe why you are doing this, what kind of
> > problem are you trying to solve and what exactly are you trying to do
> > here.
> >
> > BR,
> > Krzysztof
> >
> 
> [snip]
> 
> Usually we would disable the clk on error patch and return with failed.
> but in the current code we disable the clk in init routine and
> enable the clk in disable routine which seem incorrect.

No. For example for exynos5_usbdrd_phy_exit() the driver enables the
clock only for the access to PHY block (PHY registers).

> 
> [0] https://github.com/torvalds/linux/blob/master/drivers/phy/samsung/phy-exynos5-usbdrd.c#L362-L412
> [1] https://github.com/torvalds/linux/blob/master/drivers/phy/samsung/phy-exynos5-usbdrd.c#L424-L446
> 
> On 3.10.x kernel clk_summary all the clk are enables.
> 
>     mout_usbdrd300              3           3            24000000
>        dout_usbdrd300           2           2            24000000
>           sclk_usbdrd300        1           1            24000000
>        dout_usbphy300           2           2            24000000
>           sclk_usbphy300        1           1            24000000
>     mout_usbdrd301              3           3            24000000
>        dout_usbdrd301           2           2            24000000
>           sclk_usbdrd301        1           1            24000000
>        dout_usbphy301           2           2            24000000
>           sclk_usbphy301        1           1            24000000
> 
> Some more changes in clk driver might be required to stabilize the usb module.

Please describe the issues with stability first.

Best regards,
Krzysztof

  reply	other threads:[~2017-10-08 15:50 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-06  4:36 [RFC 1/2] ARM: dts: exynos: update the usbdrd phy and ref clk Anand Moon
2017-10-06  4:36 ` [RFC 2/2] phy: exynos5-usbdrd: remove disable and enable of phy clk Anand Moon
2017-10-06  6:42   ` Krzysztof Kozlowski
2017-10-08 12:41     ` Anand Moon
2017-10-08 15:50       ` Krzysztof Kozlowski [this message]
2017-10-08 21:07         ` Anand Moon
2017-10-09 15:16           ` Anand Moon
2017-10-09 16:59             ` Krzysztof Kozlowski
2017-10-09 16:34           ` Krzysztof Kozlowski
2017-10-06  6:38 ` [RFC 1/2] ARM: dts: exynos: update the usbdrd phy and ref clk Krzysztof Kozlowski
2017-10-08 12:36   ` Anand Moon
2017-10-08 15:47     ` Krzysztof Kozlowski
2017-10-08 21:06       ` Anand Moon
2017-10-09 17:05         ` Krzysztof Kozlowski
2017-10-10  6:27     ` Vivek Gautam
2017-10-11  5:46       ` Anand Moon

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