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From: hch@infradead.org (Christoph Hellwig)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/9] SOC: brcmstb: add memory API
Date: Tue, 17 Oct 2017 01:24:13 -0700	[thread overview]
Message-ID: <20171017082413.GA10574@infradead.org> (raw)
In-Reply-To: <1507761269-7017-2-git-send-email-jim2101024@gmail.com>

> +/* Macros to help extract property data */
> +#define U8TOU32(b, offs) \
> +	((((u32)b[0 + offs] << 0)  & 0x000000ff) | \
> +	 (((u32)b[1 + offs] << 8)  & 0x0000ff00) | \
> +	 (((u32)b[2 + offs] << 16) & 0x00ff0000) | \
> +	 (((u32)b[3 + offs] << 24) & 0xff000000))

Please us helpers like get_unaligned_le32 instead opencoding them.

> +#define DT_PROP_DATA_TO_U32(b, offs) (fdt32_to_cpu(U8TOU32(b, offs)))

And together with this it looks really whacky.  So you're converting
from le to native first and then do another conversion from be to cpu?

Something doesn't work out here.

> +/* -------------------- Functions -------------------- */

Please remove pointless comments like this one.

> +
> +/*
> + * If the DT nodes are handy, determine which MEMC holds the specified
> + * physical address.
> + */
> +#ifdef CONFIG_ARCH_BRCMSTB
> +int __brcmstb_memory_phys_addr_to_memc(phys_addr_t pa, void __iomem *base)

Please move this into the arm arch code.

> +#elif defined(CONFIG_MIPS)

And this into the mips arch code.

> +EXPORT_SYMBOL(brcmstb_memory_phys_addr_to_memc);

> +EXPORT_SYMBOL(brcmstb_memory_memc_size);

Why is this exported?

  parent reply	other threads:[~2017-10-17  8:24 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-11 22:34 PCI: brcmstb: Add Broadcom Settopbox PCIe support Jim Quinlan
2017-10-11 22:34 ` [PATCH 1/9] SOC: brcmstb: add memory API Jim Quinlan
2017-10-12 14:41   ` Julien Thierry
2017-10-12 16:53     ` Florian Fainelli
2017-10-17  8:24   ` Christoph Hellwig [this message]
2017-10-17 16:12     ` Florian Fainelli
2017-10-18  6:46       ` Christoph Hellwig
2017-10-18 16:47         ` Florian Fainelli
2017-10-11 22:34 ` [PATCH 2/9] PCI: host: brcmstb: add DT docs for Brcmstb PCIe device Jim Quinlan
2017-10-12  0:55   ` Brian Norris
2017-10-12 17:52     ` Jim Quinlan
2017-10-17 20:24   ` Rob Herring
2017-10-17 22:42     ` Jim Quinlan
2017-10-19 21:49       ` Rob Herring
2017-10-19 21:58         ` Florian Fainelli
2017-10-20 17:27           ` Brian Norris
2017-10-20 21:39             ` Rob Herring
2017-10-19 23:04         ` Jim Quinlan
2017-10-11 22:34 ` [PATCH 3/9] PCI: host: brcmstb: Broadcom PCIe Host Controller Jim Quinlan
2017-10-11 22:34 ` [PATCH 4/9] arm64: dma-mapping: export symbol arch_setup_dma_ops Jim Quinlan
2017-10-12 17:06   ` Robin Murphy
2017-10-12 18:15     ` Jim Quinlan
2017-10-11 22:34 ` [PATCH 5/9] PCI: host: brcmstb: add dma-ranges for inbound traffic Jim Quinlan
2017-10-12 18:04   ` Robin Murphy
2017-10-12 21:43     ` Jim Quinlan
2017-10-17  8:14     ` Christoph Hellwig
2017-10-17 16:11       ` Jim Quinlan
2017-10-18  6:53         ` Christoph Hellwig
2017-10-18 14:41           ` Jim Quinlan
2017-10-19  9:16             ` Christoph Hellwig
2017-10-19 22:47               ` Jim Quinlan
2017-10-20  7:37                 ` Christoph Hellwig
2017-10-20 14:41                   ` Jim Quinlan
2017-10-20 14:57                     ` Christoph Hellwig
2017-10-20 15:27                       ` Jim Quinlan
2017-10-20 16:17                         ` Christoph Hellwig
2017-10-23  9:06                         ` David Laight
2017-10-24 18:08                           ` Jim Quinlan
2017-10-25  9:36                             ` David Laight
2017-10-11 22:34 ` [PATCH 6/9] PCI/MSI: Enable PCI_MSI_IRQ_DOMAIN support for MIPS Jim Quinlan
2017-10-11 22:34 ` [PATCH 7/9] PCI: host: brcmstb: add MSI capability Jim Quinlan
2017-10-11 22:34 ` [PATCH 8/9] MIPS: BMIPS: add PCI bindings for 7425, 7435 Jim Quinlan
2017-10-11 22:34 ` [PATCH 9/9] MIPS: BMIPS: enable PCI Jim Quinlan

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