From: cdall@linaro.org (Christoffer Dall)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 02/28] arm64: KVM: Hide unsupported AArch64 CPU features from guests
Date: Wed, 18 Oct 2017 21:19:55 +0200 [thread overview]
Message-ID: <20171018191955.GK8900@cbox> (raw)
In-Reply-To: <20171018144509.GZ19485@e103592.cambridge.arm.com>
On Wed, Oct 18, 2017 at 03:45:10PM +0100, Dave Martin wrote:
> On Wed, Oct 18, 2017 at 03:20:26PM +0200, Christoffer Dall wrote:
> > On Tue, Oct 17, 2017 at 03:08:40PM +0100, Marc Zyngier wrote:
> > > On 17/10/17 14:51, Christoffer Dall wrote:
> > > > On Tue, Oct 10, 2017 at 07:38:19PM +0100, Dave Martin wrote:
>
> [...]
>
> > > >> +/* sys_reg_desc initialiser for known cpufeature ID registers */
> > > >> +#define ID_SANITISED(name) { \
> > > >> + SYS_DESC(SYS_##name), \
> > > >> + .access = access_id_reg, \
> > > >> + .get_user = get_id_reg, \
> > > >> + .set_user = set_id_reg, \
> > > >> +}
> > > >> +
> > > >> +/*
> > > >> + * sys_reg_desc initialiser for architecturally unallocated cpufeature ID
> > > >> + * register with encoding Op0=3, Op1=0, CRn=0, CRm=crm, Op2=op2
> > > >> + * (1 <= crm < 8, 0 <= Op2 < 8).
> > > >> + */
> > > >> +#define ID_UNALLOCATED(crm, op2) { \
> > > >> + Op0(3), Op1(0), CRn(0), CRm(crm), Op2(op2), \
> > > >> + .access = access_raz_id_reg, \
> > > >> + .get_user = get_raz_id_reg, \
> > > >> + .set_user = set_raz_id_reg, \
> > > >> +}
> > > >> +
> > > >> +/*
> > > >> + * sys_reg_desc initialiser for known ID registers that we hide from guests.
> > > >> + * For now, these are exposed just like unallocated ID regs: they appear
> > > >> + * RAZ for the guest.
> > > >> + */
> > > >
> > > > What is a hidden ID register as opposed to an unallocated one?
> > >
> > > A hidden register is one where all the features have been removed (RAZ),
> > > making it similar to an unallocated one.
> > >
> > > > Shouldn't one of them presumably cause an undefined exception in the
> > > > guest?
> > >
> > > No, that'd be a violation of the architecture. The unallocated ID
> > > registers are required to be RAZ (see table D9-2 in D9.3.1), so that
> > > software can probe for feature without running the risk of getting an UNDEF.
> > >
> > Then I'm not really sure why we need the two defines. Is that just to
> > make it clear what the different rationales for dealing with various
> > registers in the same way are?
>
> Basically yes.
>
> ID_HIDDEN() means we are bodging around something that we don't know
> how to sanitise, whereas ID_UNALLOCATED() means that we follow the
> architecture in returning zero for reads (maybe following an older
> architecture version than the silicon).
>
> ID_HIDDEN()s may need to evolve SoC-specific quirkage if we need to
> expose non-architectural SoC-specific features via the mechanism.
> These should never simply be exposed unless the architecture is
> tightened in the future in such a way as to make this safe (unlikely).
>
> ID_UNALLOCATED()s OTOH will mostly turn into ID_SANITISED() as the
> architecture gains new features. The architecture could allocate new
> IMP DEF feature regs though, in which case they would become ID_HIDDEN()
> as soon as we know about them.
>
>
> The distinction is drawn in attempt to help maintainers: the future
> maintenance requirements for IN_UNALLOCATED()s will differ from
> ID_HIDDEN()s.
>
Thanks for the explanation.
-Christoffer
next prev parent reply other threads:[~2017-10-18 19:19 UTC|newest]
Thread overview: 109+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-10 18:38 [PATCH v3 00/28] ARM Scalable Vector Extension (SVE) Dave Martin
2017-10-10 18:38 ` [PATCH v3 01/28] regset: Add support for dynamically sized regsets Dave Martin
2017-10-11 14:14 ` Catalin Marinas
2017-10-11 14:45 ` Dave Martin
2017-10-10 18:38 ` [PATCH v3 02/28] arm64: KVM: Hide unsupported AArch64 CPU features from guests Dave Martin
2017-10-11 14:14 ` Catalin Marinas
2017-10-11 16:21 ` Marc Zyngier
2017-10-17 13:51 ` Christoffer Dall
2017-10-17 14:08 ` Marc Zyngier
2017-10-18 13:20 ` Christoffer Dall
2017-10-18 14:45 ` Dave Martin
2017-10-18 19:19 ` Christoffer Dall [this message]
2017-10-10 18:38 ` [PATCH v3 03/28] arm64: efi: Add missing Kconfig dependency on KERNEL_MODE_NEON Dave Martin
2017-10-11 14:16 ` Catalin Marinas
2017-10-11 14:35 ` Dave Martin
2017-10-10 18:38 ` [PATCH v3 04/28] arm64: Port deprecated instruction emulation to new sysctl interface Dave Martin
2017-10-11 14:17 ` Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 05/28] arm64: fpsimd: Simplify uses of {set, clear}_ti_thread_flag() Dave Martin
2017-10-11 14:19 ` Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 06/28] arm64/sve: System register and exception syndrome definitions Dave Martin
2017-10-11 14:20 ` Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 07/28] arm64/sve: Low-level SVE architectural state manipulation functions Dave Martin
2017-10-11 14:28 ` Catalin Marinas
2017-10-11 14:39 ` Dave Martin
2017-10-10 18:38 ` [PATCH v3 08/28] arm64/sve: Kconfig update and conditional compilation support Dave Martin
2017-10-11 14:29 ` Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 09/28] arm64/sve: Signal frame and context structure definition Dave Martin
2017-10-11 14:29 ` Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 10/28] arm64/sve: Low-level CPU setup Dave Martin
2017-10-11 14:30 ` Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 11/28] arm64/sve: Core task context handling Dave Martin
2017-10-11 16:15 ` Catalin Marinas
2017-10-12 16:05 ` Dave Martin
2017-10-13 13:57 ` Catalin Marinas
2017-10-13 17:53 ` Dave Martin
2017-10-10 18:38 ` [PATCH v3 12/28] arm64/sve: Support vector length resetting for new processes Dave Martin
2017-10-11 16:16 ` Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 13/28] arm64/sve: Signal handling support Dave Martin
2017-10-11 16:40 ` Catalin Marinas
2017-10-12 16:11 ` Dave Martin
2017-10-13 11:17 ` Catalin Marinas
2017-10-13 14:26 ` Dave Martin
2017-10-10 18:38 ` [PATCH v3 14/28] arm64/sve: Backend logic for setting the vector length Dave Martin
2017-10-11 16:43 ` Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 15/28] arm64: cpufeature: Move sys_caps_initialised declarations Dave Martin
2017-10-11 16:50 ` Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 16/28] arm64/sve: Probe SVE capabilities and usable vector lengths Dave Martin
2017-10-11 16:55 ` Catalin Marinas
2017-10-12 12:56 ` Suzuki K Poulose
2017-10-16 15:46 ` Dave Martin
2017-10-16 16:27 ` Suzuki K Poulose
2017-10-16 16:44 ` Dave Martin
2017-10-16 16:47 ` Suzuki K Poulose
2017-10-16 16:55 ` Dave Martin
2017-10-16 16:58 ` Suzuki K Poulose
2017-10-10 18:38 ` [PATCH v3 17/28] arm64/sve: Preserve SVE registers around kernel-mode NEON use Dave Martin
2017-10-12 10:15 ` Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 18/28] arm64/sve: Preserve SVE registers around EFI runtime service calls Dave Martin
2017-10-12 10:57 ` Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 19/28] arm64/sve: ptrace and ELF coredump support Dave Martin
2017-10-12 17:06 ` Catalin Marinas
2017-10-13 16:16 ` Dave Martin
2017-10-18 10:32 ` Catalin Marinas
2017-10-18 16:02 ` Dave Martin
2017-10-10 18:38 ` [PATCH v3 20/28] arm64/sve: Add prctl controls for userspace vector length management Dave Martin
2017-10-12 17:11 ` Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 21/28] arm64/sve: Add sysctl to set the default vector length for new processes Dave Martin
2017-10-12 17:11 ` Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 22/28] arm64/sve: KVM: Prevent guests from using SVE Dave Martin
2017-10-11 16:28 ` Marc Zyngier
2017-10-12 11:04 ` Dave Martin
2017-10-12 11:28 ` Marc Zyngier
2017-10-13 14:15 ` Dave Martin
2017-10-13 14:21 ` Marc Zyngier
2017-10-13 16:47 ` Dave Martin
2017-10-12 17:13 ` Catalin Marinas
2017-10-17 11:50 ` Christoffer Dall
2017-10-17 14:31 ` Dave Martin
2017-10-18 13:23 ` Christoffer Dall
2017-10-18 15:00 ` Dave Martin
2017-10-18 19:22 ` Christoffer Dall
2017-10-10 18:38 ` [PATCH v3 23/28] arm64/sve: KVM: Treat guest SVE use as undefined instruction execution Dave Martin
2017-10-12 17:13 ` Catalin Marinas
2017-10-17 13:58 ` Christoffer Dall
2017-10-10 18:38 ` [PATCH v3 24/28] arm64/sve: KVM: Hide SVE from CPU features exposed to guests Dave Martin
2017-10-11 16:31 ` Marc Zyngier
2017-10-12 17:13 ` Catalin Marinas
2017-10-17 13:58 ` Christoffer Dall
2017-10-17 14:07 ` Dave Martin
2017-10-17 14:29 ` Marc Zyngier
2017-10-17 15:47 ` Dave Martin
2017-10-18 13:21 ` Christoffer Dall
2017-10-18 15:01 ` Dave Martin
2017-10-18 16:49 ` Christoffer Dall
2017-10-10 18:38 ` [PATCH v3 25/28] arm64/sve: Detect SVE and activate runtime support Dave Martin
2017-10-11 17:11 ` Suzuki K Poulose
2017-10-12 17:14 ` Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 26/28] arm64/sve: Add documentation Dave Martin
2017-10-11 9:50 ` Szabolcs Nagy
2017-10-11 11:08 ` Dave Martin
2017-10-11 11:30 ` Szabolcs Nagy
2017-10-13 14:24 ` Catalin Marinas
2017-10-13 17:17 ` Dave Martin
2017-10-18 9:32 ` Catalin Marinas
2017-10-13 17:35 ` Dave Martin
2017-10-10 18:38 ` [RFC PATCH v3 27/28] arm64: signal: Report signal frame size to userspace via auxv Dave Martin
2017-10-11 10:19 ` Szabolcs Nagy
2017-10-11 13:14 ` Dave P Martin
2017-10-10 18:38 ` [RFC PATCH v3 28/28] arm64/sve: signal: Include SVE when computing AT_MINSIGSTKSZ Dave Martin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20171018191955.GK8900@cbox \
--to=cdall@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).