[PATCH v2 0/3] pinctrl: sunxi: Start to enforce the strict mode

[PATCH v2 0/3] pinctrl: sunxi: Start to enforce the strict mode

[Maxime Ripard]

Hi,

Here is an attempt to enable pinctrl's strict mode on our pinctrl drivers.
Indeed, our controllers should have had that mode enabled since its
introduction.

However, there's a number of issues with old device trees that prevent from
just enabling it for all the devices. There's basically two of them:

  - Most of our old DTs have a pinctrl node for GPIOs, which will result in
    an error when the driver is going to request the gpio because it would
    already be requested automatically by pinctrl. We cannot break those.

  - Some of these GPIOs also need to change their pin configuration to add
    a bias or change the current output, and there isn't a migration path.

Let's just keep the old behaviour for the old SoCs, and enforce it on the
new one, and enabled it by default so that the situation at least doesn't
get worse.

This has been tested on an A83t (strict on) and an H3 (strict off) board.

Let me know what you think,
Maxime

Changes from v1:
  - Duplicate the pmx_ops before modifying them
  - Disable the strict mode for R_PIO as well

Maxime Ripard (3):
  pinctrl: sunxi: Introduce the strict flag
  pinctrl: sunxi: Disable strict mode for old pinctrl drivers
  pinctrl: sunxi: Enforce the strict mode by default

 drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c   |  1 +
 drivers/pinctrl/sunxi/pinctrl-sun5i.c       |  1 +
 drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c |  1 +
 drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c   |  1 +
 drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c |  1 +
 drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c   |  1 +
 drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c   |  1 +
 drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c  |  3 ++-
 drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c    |  3 ++-
 drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c |  1 +
 drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c   |  1 +
 drivers/pinctrl/sunxi/pinctrl-sunxi.c       | 13 ++++++++++++-
 drivers/pinctrl/sunxi/pinctrl-sunxi.h       |  1 +
 13 files changed, 26 insertions(+), 3 deletions(-)

base-commit: bba731ac5505e73c9b0681762ee0cfa52ccfffed
-- 
git-series 0.9.1

[PATCH v2 1/3] pinctrl: sunxi: Introduce the strict flag

[Maxime Ripard]

Our pinctrl device should have had strict set all along. However, it wasn't
the case, and most of our old device trees also have a pinctrl group in
addition to the GPIOs properties, which mean that we can't really turn it
on now.

All our new SoCs don't have that group, so we should still enable that mode
on the newer one though.

In order to enable it by default, add a flag that will allow to disable
that mode that should be set by pinctrl drivers that cannot be migrated.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 drivers/pinctrl/sunxi/pinctrl-sunxi.c | 12 +++++++++++-
 drivers/pinctrl/sunxi/pinctrl-sunxi.h |  1 +
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index 52edf3b5988d..3bbb34435e0f 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -1245,6 +1245,7 @@ int sunxi_pinctrl_init_with_variant(struct platform_device *pdev,
 	struct pinctrl_desc *pctrl_desc;
 	struct pinctrl_pin_desc *pins;
 	struct sunxi_pinctrl *pctl;
+	struct pinmux_ops *pmxops;
 	struct resource *res;
 	int i, ret, last_pin, pin_idx;
 	struct clk *clk;
@@ -1305,7 +1306,16 @@ int sunxi_pinctrl_init_with_variant(struct platform_device *pdev,
 	pctrl_desc->npins = pctl->ngroups;
 	pctrl_desc->confops = &sunxi_pconf_ops;
 	pctrl_desc->pctlops = &sunxi_pctrl_ops;
-	pctrl_desc->pmxops =  &sunxi_pmx_ops;
+
+	pmxops = devm_kmemdup(&pdev->dev, &sunxi_pmx_ops, sizeof(sunxi_pmx_ops),
+			      GFP_KERNEL);
+	if (!pmxops)
+		return -ENOMEM;
+
+	if (desc->disable_strict_mode)
+		pmxops->strict = false;
+
+	pctrl_desc->pmxops = pmxops;
 
 	pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, pctrl_desc, pctl);
 	if (IS_ERR(pctl->pctl_dev)) {
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
index 1bfc0d8a55df..11b128f54ed2 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
@@ -112,6 +112,7 @@ struct sunxi_pinctrl_desc {
 	unsigned			irq_banks;
 	unsigned			irq_bank_base;
 	bool				irq_read_needs_mux;
+	bool				disable_strict_mode;
 };
 
 struct sunxi_pinctrl_function {
-- 
git-series 0.9.1

[PATCH v2 2/3] pinctrl: sunxi: Disable strict mode for old pinctrl drivers

[Maxime Ripard]

Old pinctrl drivers will need to disable strict mode for various reasons,
among which:
  - Some DT will still have a pinctrl group for each GPIO used, which will
    be rejected by pin_request. While we could remove those nodes, we still
    have to deal with old DTs.
  - Some GPIOs on these boards need to have their pin configuration changed
    (for bias or current), and there's no clear migration path

Let's disable the strict mode on those SoCs so that there's no breakage.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c   | 1 +
 drivers/pinctrl/sunxi/pinctrl-sun5i.c       | 1 +
 drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c | 1 +
 drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c   | 1 +
 drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c | 1 +
 drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c   | 1 +
 drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c   | 1 +
 drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c  | 3 ++-
 drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c    | 3 ++-
 drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c | 1 +
 drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c   | 1 +
 11 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
index f763d8d62d6e..295e48fc94bc 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
@@ -1289,6 +1289,7 @@ static const struct sunxi_pinctrl_desc sun4i_a10_pinctrl_data = {
 	.npins = ARRAY_SIZE(sun4i_a10_pins),
 	.irq_banks = 1,
 	.irq_read_needs_mux = true,
+	.disable_strict_mode = true,
 };
 
 static int sun4i_a10_pinctrl_probe(struct platform_device *pdev)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun5i.c b/drivers/pinctrl/sunxi/pinctrl-sun5i.c
index 47afd558b114..27ec99e81c4c 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun5i.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun5i.c
@@ -713,6 +713,7 @@ static const struct sunxi_pinctrl_desc sun5i_pinctrl_data = {
 	.pins = sun5i_pins,
 	.npins = ARRAY_SIZE(sun5i_pins),
 	.irq_banks = 1,
+	.disable_strict_mode = true,
 };
 
 static int sun5i_pinctrl_probe(struct platform_device *pdev)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c
index 49a1deb97bb7..a00246d3dd49 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c
@@ -106,6 +106,7 @@ static const struct sunxi_pinctrl_desc sun6i_a31_r_pinctrl_data = {
 	.npins = ARRAY_SIZE(sun6i_a31_r_pins),
 	.pin_base = PL_BASE,
 	.irq_banks = 2,
+	.disable_strict_mode = true,
 };
 
 static int sun6i_a31_r_pinctrl_probe(struct platform_device *pdev)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
index 951a25c18815..82ffaf466892 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
@@ -965,6 +965,7 @@ static const struct sunxi_pinctrl_desc sun6i_a31_pinctrl_data = {
 	.pins = sun6i_a31_pins,
 	.npins = ARRAY_SIZE(sun6i_a31_pins),
 	.irq_banks = 4,
+	.disable_strict_mode = true,
 };
 
 static int sun6i_a31_pinctrl_probe(struct platform_device *pdev)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c
index 67ee6f9b3b68..8a08c4afc6a8 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c
@@ -93,6 +93,7 @@ static const struct sunxi_pinctrl_desc sun8i_a23_r_pinctrl_data = {
 	.npins = ARRAY_SIZE(sun8i_a23_r_pins),
 	.pin_base = PL_BASE,
 	.irq_banks = 1,
+	.disable_strict_mode = true,
 };
 
 static int sun8i_a23_r_pinctrl_probe(struct platform_device *pdev)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
index 721b6935baf3..402fd7d21e7b 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
@@ -563,6 +563,7 @@ static const struct sunxi_pinctrl_desc sun8i_a23_pinctrl_data = {
 	.pins = sun8i_a23_pins,
 	.npins = ARRAY_SIZE(sun8i_a23_pins),
 	.irq_banks = 3,
+	.disable_strict_mode = true,
 };
 
 static int sun8i_a23_pinctrl_probe(struct platform_device *pdev)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
index ef1e0bef4099..da387211a75e 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
@@ -486,6 +486,7 @@ static const struct sunxi_pinctrl_desc sun8i_a33_pinctrl_data = {
 	.npins = ARRAY_SIZE(sun8i_a33_pins),
 	.irq_banks = 2,
 	.irq_bank_base = 1,
+	.disable_strict_mode = true,
 };
 
 static int sun8i_a33_pinctrl_probe(struct platform_device *pdev)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c
index ebfd9a26628c..b795a199e240 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c
@@ -82,7 +82,8 @@ static const struct sunxi_pinctrl_desc sun8i_h3_r_pinctrl_data = {
 	.npins = ARRAY_SIZE(sun8i_h3_r_pins),
 	.irq_banks = 1,
 	.pin_base = PL_BASE,
-	.irq_read_needs_mux = true
+	.irq_read_needs_mux = true,
+	.disable_strict_mode = true,
 };
 
 static int sun8i_h3_r_pinctrl_probe(struct platform_device *pdev)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
index 518a92df4418..d1719a738c20 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
@@ -491,7 +491,8 @@ static const struct sunxi_pinctrl_desc sun8i_h3_pinctrl_data = {
 	.pins = sun8i_h3_pins,
 	.npins = ARRAY_SIZE(sun8i_h3_pins),
 	.irq_banks = 2,
-	.irq_read_needs_mux = true
+	.irq_read_needs_mux = true,
+	.disable_strict_mode = true,
 };
 
 static int sun8i_h3_pinctrl_probe(struct platform_device *pdev)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c
index 92a873f73697..c63086c98335 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c
@@ -152,6 +152,7 @@ static const struct sunxi_pinctrl_desc sun9i_a80_r_pinctrl_data = {
 	.npins = ARRAY_SIZE(sun9i_a80_r_pins),
 	.pin_base = PL_BASE,
 	.irq_banks = 2,
+	.disable_strict_mode = true,
 };
 
 static int sun9i_a80_r_pinctrl_probe(struct platform_device *pdev)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
index bc14e954d7a2..472ef0d91b99 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
@@ -721,6 +721,7 @@ static const struct sunxi_pinctrl_desc sun9i_a80_pinctrl_data = {
 	.pins = sun9i_a80_pins,
 	.npins = ARRAY_SIZE(sun9i_a80_pins),
 	.irq_banks = 5,
+	.disable_strict_mode = true,
 };
 
 static int sun9i_a80_pinctrl_probe(struct platform_device *pdev)
-- 
git-series 0.9.1

[PATCH v2 3/3] pinctrl: sunxi: Enforce the strict mode by default

[Maxime Ripard]

The strict mode should always have been enabled on our driver, and leaving
it unchecked just makes it harder to find a migration path as time passes.

Let's enable it by default now so that hopefully the new SoCs should be
safe.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 drivers/pinctrl/sunxi/pinctrl-sunxi.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index 3bbb34435e0f..4b6cb25bc796 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -696,6 +696,7 @@ static const struct pinmux_ops sunxi_pmx_ops = {
 	.get_function_groups	= sunxi_pmx_get_func_groups,
 	.set_mux		= sunxi_pmx_set_mux,
 	.gpio_set_direction	= sunxi_pmx_gpio_set_direction,
+	.strict			= true,
 };
 
 static int sunxi_pinctrl_gpio_direction_input(struct gpio_chip *chip,
-- 
git-series 0.9.1

[PATCH v2 0/3] pinctrl: sunxi: Start to enforce the strict mode

[Chen-Yu Tsai]

On Tue, Oct 10, 2017 at 4:53 AM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> Hi,
>
> Here is an attempt to enable pinctrl's strict mode on our pinctrl drivers.
> Indeed, our controllers should have had that mode enabled since its
> introduction.
>
> However, there's a number of issues with old device trees that prevent from
> just enabling it for all the devices. There's basically two of them:
>
>   - Most of our old DTs have a pinctrl node for GPIOs, which will result in
>     an error when the driver is going to request the gpio because it would
>     already be requested automatically by pinctrl. We cannot break those.
>
>   - Some of these GPIOs also need to change their pin configuration to add
>     a bias or change the current output, and there isn't a migration path.
>
> Let's just keep the old behaviour for the old SoCs, and enforce it on the
> new one, and enabled it by default so that the situation at least doesn't
> get worse.
>
> This has been tested on an A83t (strict on) and an H3 (strict off) board.
>
> Let me know what you think,
> Maxime
>
> Changes from v1:
>   - Duplicate the pmx_ops before modifying them
>   - Disable the strict mode for R_PIO as well
>
> Maxime Ripard (3):
>   pinctrl: sunxi: Introduce the strict flag
>   pinctrl: sunxi: Disable strict mode for old pinctrl drivers
>   pinctrl: sunxi: Enforce the strict mode by default

Acked-by: Chen-Yu Tsai <wens@csie.org>

[PATCH v2 0/3] pinctrl: sunxi: Start to enforce the strict mode

[Maxime Ripard]

Hi Linus,

On Mon, Oct 09, 2017 at 10:53:36PM +0200, Maxime Ripard wrote:
> Hi,
> 
> Here is an attempt to enable pinctrl's strict mode on our pinctrl drivers.
> Indeed, our controllers should have had that mode enabled since its
> introduction.
> 
> However, there's a number of issues with old device trees that prevent from
> just enabling it for all the devices. There's basically two of them:
> 
>   - Most of our old DTs have a pinctrl node for GPIOs, which will result in
>     an error when the driver is going to request the gpio because it would
>     already be requested automatically by pinctrl. We cannot break those.
> 
>   - Some of these GPIOs also need to change their pin configuration to add
>     a bias or change the current output, and there isn't a migration path.
> 
> Let's just keep the old behaviour for the old SoCs, and enforce it on the
> new one, and enabled it by default so that the situation at least doesn't
> get worse.
> 
> This has been tested on an A83t (strict on) and an H3 (strict off) board.

Did you have some time to look at this?

The earlier we merge it the better, so ideally I'd really like to get
this into 4.15.

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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[PATCH v2 1/3] pinctrl: sunxi: Introduce the strict flag

[Linus Walleij]

On Mon, Oct 9, 2017 at 10:53 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:

> Our pinctrl device should have had strict set all along. However, it wasn't
> the case, and most of our old device trees also have a pinctrl group in
> addition to the GPIOs properties, which mean that we can't really turn it
> on now.
>
> All our new SoCs don't have that group, so we should still enable that mode
> on the newer one though.
>
> In order to enable it by default, add a flag that will allow to disable
> that mode that should be set by pinctrl drivers that cannot be migrated.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Patch applied.

Yours,
Linus Walleij

[PATCH v2 2/3] pinctrl: sunxi: Disable strict mode for old pinctrl drivers

[Linus Walleij]

On Mon, Oct 9, 2017 at 10:53 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:

> Old pinctrl drivers will need to disable strict mode for various reasons,
> among which:
>   - Some DT will still have a pinctrl group for each GPIO used, which will
>     be rejected by pin_request. While we could remove those nodes, we still
>     have to deal with old DTs.
>   - Some GPIOs on these boards need to have their pin configuration changed
>     (for bias or current), and there's no clear migration path
>
> Let's disable the strict mode on those SoCs so that there's no breakage.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Patch applied.

Yours,
Linus Walleij

[PATCH v2 3/3] pinctrl: sunxi: Enforce the strict mode by default

[Linus Walleij]

On Mon, Oct 9, 2017 at 10:53 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:

> The strict mode should always have been enabled on our driver, and leaving
> it unchecked just makes it harder to find a migration path as time passes.
>
> Let's enable it by default now so that hopefully the new SoCs should be
> safe.
>
> Acked-by: Chen-Yu Tsai <wens@csie.org>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Patch applied.

Yours,
Linus Walleij

[PATCH v2 0/3] pinctrl: sunxi: Start to enforce the strict mode

[Linus Walleij]

On Wed, Oct 25, 2017 at 2:40 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:

> Did you have some time to look at this?
>
> The earlier we merge it the better, so ideally I'd really like to get
> this into 4.15.

Just overloaded as usual.

Patches applied.

Yours,
Linus Walleij

[PATCH v2 0/3] pinctrl: sunxi: Start to enforce the strict mode

[Maxime Ripard]

On Tue, Oct 31, 2017 at 09:46:54AM +0100, Linus Walleij wrote:
> On Wed, Oct 25, 2017 at 2:40 PM, Maxime Ripard
> <maxime.ripard@free-electrons.com> wrote:
> 
> > Did you have some time to look at this?
> >
> > The earlier we merge it the better, so ideally I'd really like to get
> > this into 4.15.
> 
> Just overloaded as usual.
> 
> Patches applied.

No worries, thanks for applying them ! :)

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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