From: f.fainelli@gmail.com (Florian Fainelli)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 6/9] soc: brcmstb: biuctrl: Wire-up new registers
Date: Wed, 29 Nov 2017 12:18:46 -0800 [thread overview]
Message-ID: <20171129201849.17522-7-f.fainelli@gmail.com> (raw)
In-Reply-To: <20171129201849.17522-1-f.fainelli@gmail.com>
Add definitions for B53 systems register: CPU_MCP_FLOW_REG and
CPU_WRITEBACK_CTRL_REG. These register will be saved and restored
accordingly.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/soc/bcm/brcmstb/biuctrl.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/soc/bcm/brcmstb/biuctrl.c b/drivers/soc/bcm/brcmstb/biuctrl.c
index 16cbfc2e953a..d498f9db01ab 100644
--- a/drivers/soc/bcm/brcmstb/biuctrl.c
+++ b/drivers/soc/bcm/brcmstb/biuctrl.c
@@ -49,17 +49,23 @@ static inline void cbc_writel(u32 val, int reg)
enum cpubiuctrl_regs {
CPU_CREDIT_REG = 0,
+ CPU_MCP_FLOW_REG,
+ CPU_WRITEBACK_CTRL_REG
};
static const int b15_cpubiuctrl_regs[] = {
[CPU_CREDIT_REG] = 0x184,
+ [CPU_MCP_FLOW_REG] = -1,
+ [CPU_WRITEBACK_CTRL_REG] = -1,
};
static const int b53_cpubiuctrl_regs[] = {
[CPU_CREDIT_REG] = 0x0b0,
+ [CPU_MCP_FLOW_REG] = 0x0b4,
+ [CPU_WRITEBACK_CTRL_REG] = 0x22c,
};
-#define NUM_CPU_BIUCTRL_REGS 1
+#define NUM_CPU_BIUCTRL_REGS 3
static int __init mcp_write_pairing_set(void)
{
--
2.9.3
next prev parent reply other threads:[~2017-11-29 20:18 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-29 20:18 [PATCH 0/9] soc: brcmstb: biuctrl updates for 64-bit chips Florian Fainelli
2017-11-29 20:18 ` [PATCH 1/9] dt-bindings: arm: Add entry for Broadcom Brahma-B53 Florian Fainelli
2017-12-01 2:18 ` Rob Herring
2017-11-29 20:18 ` [PATCH 2/9] dt-bindings: arm: brcmstb: Correct BIUCTRL node documentation Florian Fainelli
2017-12-01 2:21 ` Rob Herring
2017-11-29 20:18 ` [PATCH 3/9] soc: brcmstb: Make CPU credit offset more parameterized Florian Fainelli
2017-11-29 20:18 ` [PATCH 4/9] soc: brcmstb: Correct CPU_CREDIT_REG offset for Brahma-B53 CPUs Florian Fainelli
2017-11-29 20:18 ` [PATCH 5/9] soc: brcmstb: biuctrl: Prepare for saving/restoring other registers Florian Fainelli
2017-11-29 20:18 ` Florian Fainelli [this message]
2017-11-29 20:18 ` [PATCH 7/9] soc: brcmstb: biuctrl: Fine tune B53 MCP interface settings Florian Fainelli
2017-11-29 20:18 ` [PATCH 8/9] soc: brcmstb: Split initialization Florian Fainelli
2017-11-29 20:18 ` [PATCH 9/9] soc: brcmstb: biuctrl: Move to early_initcall Florian Fainelli
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