From mboxrd@z Thu Jan 1 00:00:00 1970 From: jacob-chen@iotwrt.com (Jacob Chen) Date: Wed, 6 Dec 2017 19:19:38 +0800 Subject: [PATCH v3 11/12] arm64: dts: rockchip: add rx0 mipi-phy for rk3399 In-Reply-To: <20171206111939.1153-1-jacob-chen@iotwrt.com> References: <20171206111939.1153-1-jacob-chen@iotwrt.com> Message-ID: <20171206111939.1153-12-jacob-chen@iotwrt.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org From: Shunqian Zheng It's a Designware MIPI D-PHY, used for ISP0 in rk3399. Signed-off-by: Shunqian Zheng Signed-off-by: Jacob Chen --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 66a912fab5dd..a65b110afaf3 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1292,6 +1292,17 @@ status = "disabled"; }; + mipi_dphy_rx0: mipi-dphy-rx0 { + compatible = "rockchip,rk3399-mipi-dphy"; + clocks = <&cru SCLK_MIPIDPHY_REF>, + <&cru SCLK_DPHY_RX0_CFG>, + <&cru PCLK_VIO_GRF>; + clock-names = "dphy-ref", "dphy-cfg", "grf"; + power-domains = <&power RK3399_PD_VIO>; + bus-width = <4>; + status = "disabled"; + }; + u2phy0: usb2-phy at e450 { compatible = "rockchip,rk3399-usb2phy"; reg = <0xe450 0x10>; -- 2.15.0