From: vigneshr@ti.com (Vignesh R)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 0/2] CQSPI: Add direct mode support
Date: Thu, 7 Dec 2017 12:08:02 +0530 [thread overview]
Message-ID: <20171207063804.29436-1-vigneshr@ti.com> (raw)
This patch series enables use Direct access controller on Cadence QSPI
which helps in accessing QSPI flash in memory mapped mode.
On TI platforms, this mode has higher throughput compared to indirect
access mode.
Tested on TI's 66AK2G GP EVM.
It would be great if this patch series could be tested SoCFPGA as well.
Although, this patch should have no effect on SoCFPGA platforms as driver
continues to use indirect mode when direct access memory window is less
than size of connected flash.
Vignesh R (2):
mtd: spi-nor: cadence-quadspi: Refactor indirect read/write sequence.
mtd: spi-nor: cadence-quadspi: Add support for direct access mode
drivers/mtd/spi-nor/cadence-quadspi.c | 75 ++++++++++++++++++++++++++++-------
1 file changed, 60 insertions(+), 15 deletions(-)
--
2.15.1
next reply other threads:[~2017-12-07 6:38 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-07 6:38 Vignesh R [this message]
2017-12-07 6:38 ` [PATCH 1/2] mtd: spi-nor: cadence-quadspi: Refactor indirect read/write sequence Vignesh R
2017-12-20 15:00 ` Cyrille Pitchen
2017-12-07 6:38 ` [PATCH 2/2] mtd: spi-nor: cadence-quadspi: Add support for direct access mode Vignesh R
2017-12-20 15:13 ` Cyrille Pitchen
2017-12-22 9:48 ` Vignesh R
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