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From: afzal.mohd.ma@gmail.com (afzal mohammed)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM: NOMMU: Setup VBAR/Hivecs for secondaries cores
Date: Wed, 20 Dec 2017 10:22:19 +0530	[thread overview]
Message-ID: <20171220045219.GA6416@afzalpc> (raw)
In-Reply-To: <4e80e47a-d7b4-c09c-fe88-a7dff6522038@arm.com>

Hi,

On Tue, Dec 19, 2017 at 02:44:01PM +0000, Vladimir Murzin wrote:

> > Was the issue observed on Cortex-R ?, and was it occuring with
> > CONFIG_CPU_HIGH_VECTOR enabled or disabled ?
> 
> I caught it when was trying to setup VBAR and after code inspection I
> noticed that setting of Hivecs were changed as well.

Thinking again about this, should the Hivecs setting on secondary
CPU's be done (till a requirement comes) ?

ARM ARM deprecates using Hivecs setting on ARMv7-R, so this issue
might not be hit in practice for R class. While pre-ARMv7, lack of
Hivecs setting for secondaries, it seems can affect only ARMv6k
(multi-processing support added here ?) and i am making a guess that
even if there are ARMv6k with more than one core available, they might
not yet have run with MMU disabled to hit this case, probably the
reason no one has reported issue for long.

Perhaps, we can avoid configuring Hivecs for secondaries until some
one needs it ?

afzal

  reply	other threads:[~2017-12-20  4:52 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-19 10:23 [PATCH] ARM: NOMMU: Setup VBAR/Hivecs for secondaries cores Vladimir Murzin
2017-12-19 11:29 ` afzal mohammed
2017-12-19 14:44   ` Vladimir Murzin
2017-12-20  4:52     ` afzal mohammed [this message]
2017-12-20  9:55       ` Vladimir Murzin
2017-12-20 11:49         ` afzal mohammed
2017-12-20 12:01           ` afzal mohammed
2017-12-20 12:22             ` Vladimir Murzin
2017-12-21  4:05               ` afzal mohammed
2017-12-20 12:12           ` afzal mohammed
2017-12-20 12:22           ` Vladimir Murzin
2017-12-21  3:44             ` afzal mohammed

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