From mboxrd@z Thu Jan 1 00:00:00 1970 From: jic23@kernel.org (Jonathan Cameron) Date: Sun, 28 Jan 2018 08:34:53 +0000 Subject: [PATCH 03/16] iio: adc: sun4i-gpadc-iio: rename A33-specified registers to contain A33 In-Reply-To: <20180126151941.12183-4-embed3d@gmail.com> References: <20180126151941.12183-1-embed3d@gmail.com> <20180126151941.12183-4-embed3d@gmail.com> Message-ID: <20180128083453.5d384742@archlinux> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Fri, 26 Jan 2018 16:19:28 +0100 Philipp Rossak wrote: > From: Icenowy Zheng > > As the H3 SoC, which is also in sun8i line, has totally different > register map for the thermal sensor (a cut down version of GPADC), we > should rename A23/A33-specified registers to contain A33, in order to > prevent obfuscation with H3 registers. Currently these registers are > only prefixed "SUN8I", not "SUN8I_A33". > > Add "_A33" after "SUN8I" on the register names. > > Signed-off-by: Icenowy Zheng > Reviewed-by: Chen-Yu Tsai > Acked-by: Maxime Ripard > Acked-by: Lee Jones Acked-by: Jonathan Cameron (for the trivial change in the IIO driver) > --- > drivers/iio/adc/sun4i-gpadc-iio.c | 2 +- > include/linux/mfd/sun4i-gpadc.h | 6 +++--- > 2 files changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c > index 04d7147e0110..03804ff9c006 100644 > --- a/drivers/iio/adc/sun4i-gpadc-iio.c > +++ b/drivers/iio/adc/sun4i-gpadc-iio.c > @@ -88,7 +88,7 @@ static const struct gpadc_data sun6i_gpadc_data = { > static const struct gpadc_data sun8i_a33_gpadc_data = { > .temp_offset = -1662, > .temp_scale = 162, > - .tp_mode_en = SUN8I_GPADC_CTRL1_CHOP_TEMP_EN, > + .tp_mode_en = SUN8I_A33_GPADC_CTRL1_CHOP_TEMP_EN, > }; > > struct sun4i_gpadc_iio { > diff --git a/include/linux/mfd/sun4i-gpadc.h b/include/linux/mfd/sun4i-gpadc.h > index 139872c2e0fe..78d31984a222 100644 > --- a/include/linux/mfd/sun4i-gpadc.h > +++ b/include/linux/mfd/sun4i-gpadc.h > @@ -38,9 +38,9 @@ > #define SUN6I_GPADC_CTRL1_ADC_CHAN_SELECT(x) (GENMASK(3, 0) & BIT(x)) > #define SUN6I_GPADC_CTRL1_ADC_CHAN_MASK GENMASK(3, 0) > > -/* TP_CTRL1 bits for sun8i SoCs */ > -#define SUN8I_GPADC_CTRL1_CHOP_TEMP_EN BIT(8) > -#define SUN8I_GPADC_CTRL1_GPADC_CALI_EN BIT(7) > +/* TP_CTRL1 bits for A33 */ > +#define SUN8I_A33_GPADC_CTRL1_CHOP_TEMP_EN BIT(8) > +#define SUN8I_A33_GPADC_CTRL1_GPADC_CALI_EN BIT(7) > > #define SUN4I_GPADC_CTRL2 0x08 >