[PATCH] clk: sunxi-ng: ccu-sun4i-a10: Fix mali changing dclk frequency

[maxime.ripard@free-electrons.com (Maxime Ripard)]

Hi,

On Wed, Jan 31, 2018 at 12:23:59AM +0100, Giulio Benetti wrote:
> When mali.ko is inserted, it set default clocks and call all parent
> clocks to stay into range, causing pll-video0 to change and
> subsequently to change dclk to wrong frequencies.

This is what you should fix.

> "gpu" clock has lot of parent plls inside driver, but on sun7i
> pll8-gpu does not depend on pll-video0, pll-ve, pll-video1.
>
> It only depends on 24Mhz main clock.

I don't really know why you are mentionning that. The GPU clock has
all the parents described in the driver. And the parents' parents are
irrelevant to this particular issue.

> Remove all pll parents from gpu_parents_sun7i except "pll-gpu".

However, this is not a proper fix for your issue.

What kernel version did you use?

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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