* [PATCH] arm64: Add missing Falkor part number for branch predictor hardening
@ 2018-02-12 1:16 Shanker Donthineni
2018-02-12 8:57 ` Marc Zyngier
0 siblings, 1 reply; 3+ messages in thread
From: Shanker Donthineni @ 2018-02-12 1:16 UTC (permalink / raw)
To: linux-arm-kernel
References to CPU part number MIDR_QCOM_FALKOR were dropped from the
mailing list patch due to mainline/arm64 branch dependency. So this
patch adds the missing part number.
Fixes: ec82b567a74f ("arm64: Implement branch predictor hardening for Falkor")
Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org>
---
arch/arm64/kernel/cpu_errata.c | 9 +++++++++
arch/arm64/kvm/hyp/switch.c | 4 +++-
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c
index 0782359..52f15cd 100644
--- a/arch/arm64/kernel/cpu_errata.c
+++ b/arch/arm64/kernel/cpu_errata.c
@@ -408,6 +408,15 @@ static int qcom_enable_link_stack_sanitization(void *data)
},
{
.capability = ARM64_HARDEN_BRANCH_PREDICTOR,
+ MIDR_ALL_VERSIONS(MIDR_QCOM_FALKOR),
+ .enable = qcom_enable_link_stack_sanitization,
+ },
+ {
+ .capability = ARM64_HARDEN_BP_POST_GUEST_EXIT,
+ MIDR_ALL_VERSIONS(MIDR_QCOM_FALKOR),
+ },
+ {
+ .capability = ARM64_HARDEN_BRANCH_PREDICTOR,
MIDR_ALL_VERSIONS(MIDR_BRCM_VULCAN),
.enable = enable_smccc_arch_workaround_1,
},
diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c
index 116252a8..870f4b1 100644
--- a/arch/arm64/kvm/hyp/switch.c
+++ b/arch/arm64/kvm/hyp/switch.c
@@ -407,8 +407,10 @@ int __hyp_text __kvm_vcpu_run(struct kvm_vcpu *vcpu)
u32 midr = read_cpuid_id();
/* Apply BTAC predictors mitigation to all Falkor chips */
- if ((midr & MIDR_CPU_MODEL_MASK) == MIDR_QCOM_FALKOR_V1)
+ if (((midr & MIDR_CPU_MODEL_MASK) == MIDR_QCOM_FALKOR) ||
+ ((midr & MIDR_CPU_MODEL_MASK) == MIDR_QCOM_FALKOR_V1)) {
__qcom_hyp_sanitize_btac_predictors();
+ }
}
fp_enabled = __fpsimd_enabled();
--
Qualcomm Datacenter Technologies, Inc. on behalf of the Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH] arm64: Add missing Falkor part number for branch predictor hardening
2018-02-12 1:16 [PATCH] arm64: Add missing Falkor part number for branch predictor hardening Shanker Donthineni
@ 2018-02-12 8:57 ` Marc Zyngier
2018-02-12 11:29 ` Catalin Marinas
0 siblings, 1 reply; 3+ messages in thread
From: Marc Zyngier @ 2018-02-12 8:57 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, 12 Feb 2018 01:16:15 +0000,
Shanker Donthineni wrote:
>
> References to CPU part number MIDR_QCOM_FALKOR were dropped from the
> mailing list patch due to mainline/arm64 branch dependency. So this
> patch adds the missing part number.
>
> Fixes: ec82b567a74f ("arm64: Implement branch predictor hardening for Falkor")
> Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org>
> ---
> arch/arm64/kernel/cpu_errata.c | 9 +++++++++
> arch/arm64/kvm/hyp/switch.c | 4 +++-
> 2 files changed, 12 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c
> index 0782359..52f15cd 100644
> --- a/arch/arm64/kernel/cpu_errata.c
> +++ b/arch/arm64/kernel/cpu_errata.c
> @@ -408,6 +408,15 @@ static int qcom_enable_link_stack_sanitization(void *data)
> },
> {
> .capability = ARM64_HARDEN_BRANCH_PREDICTOR,
> + MIDR_ALL_VERSIONS(MIDR_QCOM_FALKOR),
> + .enable = qcom_enable_link_stack_sanitization,
> + },
> + {
> + .capability = ARM64_HARDEN_BP_POST_GUEST_EXIT,
> + MIDR_ALL_VERSIONS(MIDR_QCOM_FALKOR),
> + },
> + {
> + .capability = ARM64_HARDEN_BRANCH_PREDICTOR,
> MIDR_ALL_VERSIONS(MIDR_BRCM_VULCAN),
> .enable = enable_smccc_arch_workaround_1,
> },
> diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c
> index 116252a8..870f4b1 100644
> --- a/arch/arm64/kvm/hyp/switch.c
> +++ b/arch/arm64/kvm/hyp/switch.c
> @@ -407,8 +407,10 @@ int __hyp_text __kvm_vcpu_run(struct kvm_vcpu *vcpu)
> u32 midr = read_cpuid_id();
>
> /* Apply BTAC predictors mitigation to all Falkor chips */
> - if ((midr & MIDR_CPU_MODEL_MASK) == MIDR_QCOM_FALKOR_V1)
> + if (((midr & MIDR_CPU_MODEL_MASK) == MIDR_QCOM_FALKOR) ||
> + ((midr & MIDR_CPU_MODEL_MASK) == MIDR_QCOM_FALKOR_V1)) {
> __qcom_hyp_sanitize_btac_predictors();
> + }
> }
>
> fp_enabled = __fpsimd_enabled();
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
I'd suggest this goes via the arm64 tree as a matter of consistency
with the rest of the variant-2 series.
Thanks,
M.
--
Jazz is not dead, it just smell funny.
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH] arm64: Add missing Falkor part number for branch predictor hardening
2018-02-12 8:57 ` Marc Zyngier
@ 2018-02-12 11:29 ` Catalin Marinas
0 siblings, 0 replies; 3+ messages in thread
From: Catalin Marinas @ 2018-02-12 11:29 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Feb 12, 2018 at 08:57:36AM +0000, Marc Zyngier wrote:
> On Mon, 12 Feb 2018 01:16:15 +0000,
> Shanker Donthineni wrote:
> >
> > References to CPU part number MIDR_QCOM_FALKOR were dropped from the
> > mailing list patch due to mainline/arm64 branch dependency. So this
> > patch adds the missing part number.
> >
> > Fixes: ec82b567a74f ("arm64: Implement branch predictor hardening for Falkor")
> > Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org>
[...]
> Acked-by: Marc Zyngier <marc.zyngier@arm.com>
>
> I'd suggest this goes via the arm64 tree as a matter of consistency
> with the rest of the variant-2 series.
Queued for -rc2. Thanks.
--
Catalin
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2018-02-12 11:29 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-02-12 1:16 [PATCH] arm64: Add missing Falkor part number for branch predictor hardening Shanker Donthineni
2018-02-12 8:57 ` Marc Zyngier
2018-02-12 11:29 ` Catalin Marinas
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).