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From: niklas.cassel@axis.com (Niklas Cassel)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 5/8] ARM: dts: artpec: add and utilize artpec6 pin controller
Date: Wed, 21 Feb 2018 09:59:57 +0100	[thread overview]
Message-ID: <20180221090000.18091-6-niklas.cassel@axis.com> (raw)
In-Reply-To: <20180221090000.18091-1-niklas.cassel@axis.com>

Add node for the pin controller used in the artpec6 SoC,
and start using it for the exising UARTs.

Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
---
 arch/arm/boot/dts/artpec6.dtsi | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/arch/arm/boot/dts/artpec6.dtsi b/arch/arm/boot/dts/artpec6.dtsi
index 981aecd27b0b..7a6d8f39823a 100644
--- a/arch/arm/boot/dts/artpec6.dtsi
+++ b/arch/arm/boot/dts/artpec6.dtsi
@@ -180,6 +180,32 @@
 		status = "disabled";
 	};
 
+	pinctrl: pinctrl at f801d000 {
+		compatible = "axis,artpec6-pinctrl";
+		reg = <0xf801d000 0x400>;
+
+		pinctrl_uart0: uart0grp {
+			function = "uart0";
+			groups = "uart0grp2";
+			bias-pull-up;
+		};
+		pinctrl_uart1: uart1grp {
+			function = "uart1";
+			groups = "uart1grp0";
+			bias-pull-up;
+		};
+		pinctrl_uart2: uart2grp {
+			function = "uart2";
+			groups = "uart2grp1";
+			bias-pull-up;
+		};
+		pinctrl_uart3: uart3grp {
+			function = "uart3";
+			groups = "uart3grp0";
+			bias-pull-up;
+		};
+	};
+
 	amba at 0 {
 		compatible = "simple-bus";
 		#address-cells = <0x1>;
@@ -238,6 +264,8 @@
 			clocks = <&clkctrl ARTPEC6_CLK_UART_REFCLK>,
 				<&clkctrl ARTPEC6_CLK_UART_PCLK>;
 			clock-names = "uart_clk", "apb_pclk";
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_uart0>;
 			status = "disabled";
 		};
 		uart1: serial at f8037000 {
@@ -247,6 +275,8 @@
 			clocks = <&clkctrl ARTPEC6_CLK_UART_REFCLK>,
 				<&clkctrl ARTPEC6_CLK_UART_PCLK>;
 			clock-names = "uart_clk", "apb_pclk";
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_uart1>;
 			status = "disabled";
 		};
 		uart2: serial at f8038000 {
@@ -256,6 +286,8 @@
 			clocks = <&clkctrl ARTPEC6_CLK_UART_REFCLK>,
 				<&clkctrl ARTPEC6_CLK_UART_PCLK>;
 			clock-names = "uart_clk", "apb_pclk";
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_uart2>;
 			status = "disabled";
 		};
 		uart3: serial at f8039000 {
@@ -265,6 +297,8 @@
 			clocks = <&clkctrl ARTPEC6_CLK_UART_REFCLK>,
 				<&clkctrl ARTPEC6_CLK_UART_PCLK>;
 			clock-names = "uart_clk", "apb_pclk";
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_uart3>;
 			status = "disabled";
 		};
 	};
-- 
2.14.2

  parent reply	other threads:[~2018-02-21  8:59 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-21  8:59 [PATCH v2 0/8] ARTPEC-6 ARM SoC device tree updates Niklas Cassel
2018-02-21  8:59 ` [PATCH v2 1/8] ARM: dts: artpec: disable Accelerator Coherency Port Niklas Cassel
2018-02-21  8:59 ` [PATCH v2 2/8] ARM: dts: artpec: use 1 GiB RAM Niklas Cassel
2018-02-21  8:59 ` [PATCH v2 3/8] ARM: dts: artpec: remove 0x prefix from clkctrl unit address Niklas Cassel
2018-02-21  8:59 ` [PATCH v2 4/8] ARM: dts: artpec: migrate ethernet to stmmac binding Niklas Cassel
2018-02-21  8:59 ` Niklas Cassel [this message]
2018-02-21  8:59 ` [PATCH v2 6/8] ARM: dts: artpec: add and utilize nbpfaxi DMA controllers Niklas Cassel
2018-02-21  8:59 ` [PATCH v2 7/8] ARM: dts: artpec: add disabled node for PCIe endpoint mode Niklas Cassel
2018-02-21  9:00 ` [PATCH v2 8/8] ARM: dts: artpec: add node for hardware crypto accelerator Niklas Cassel
2018-03-06 16:45 ` [PATCH v2 0/8] ARTPEC-6 ARM SoC device tree updates Arnd Bergmann
2018-03-07 14:40   ` Niklas Cassel
2018-03-07 14:48     ` Arnd Bergmann

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