[PATCH 1/3] arm64: dts: ls1012a: add cpu idle support

[PATCH 1/3] arm64: dts: ls1012a: add cpu idle support

[Ran Wang]

From: Yuantian Tang <andy.tang@nxp.com>

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
---
 arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi |   18 ++++++++++++++++++
 1 files changed, 18 insertions(+), 0 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
index 82b272f..15421ef 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
@@ -70,6 +70,24 @@
 			reg = <0x0>;
 			clocks = <&clockgen 1 0>;
 			#cooling-cells = <2>;
+			cpu-idle-states = <&CPU_PH20>;
+		};
+	};
+
+	idle-states {
+		/*
+		 * PSCI node is not added default, U-boot will add missing
+		 * parts if it determines to use PSCI.
+		 */
+		entry-method = "arm,psci";
+
+		CPU_PH20: cpu-ph20 {
+			compatible = "arm,idle-state";
+			idle-state-name = "PH20";
+			arm,psci-suspend-param = <0x00010000>;
+			entry-latency-us = <1000>;
+			exit-latency-us = <1000>;
+			min-residency-us = <3000>;
 		};
 	};
 
-- 
1.7.1

[PATCH 2/3] arm64: dts: ls1043a: add cpu idle support

[Ran Wang]

From: Yuantian Tang <andy.tang@nxp.com>

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
---
 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi |   21 +++++++++++++++++++++
 1 files changed, 21 insertions(+), 0 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index 380e7c7..18828b9 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -81,6 +81,7 @@
 			clocks = <&clockgen 1 0>;
 			next-level-cache = <&l2>;
 			#cooling-cells = <2>;
+			cpu-idle-states = <&CPU_PH20>;
 		};
 
 		cpu1: cpu at 1 {
@@ -89,6 +90,7 @@
 			reg = <0x1>;
 			clocks = <&clockgen 1 0>;
 			next-level-cache = <&l2>;
+			cpu-idle-states = <&CPU_PH20>;
 		};
 
 		cpu2: cpu at 2 {
@@ -97,6 +99,7 @@
 			reg = <0x2>;
 			clocks = <&clockgen 1 0>;
 			next-level-cache = <&l2>;
+			cpu-idle-states = <&CPU_PH20>;
 		};
 
 		cpu3: cpu at 3 {
@@ -105,6 +108,7 @@
 			reg = <0x3>;
 			clocks = <&clockgen 1 0>;
 			next-level-cache = <&l2>;
+			cpu-idle-states = <&CPU_PH20>;
 		};
 
 		l2: l2-cache {
@@ -112,6 +116,23 @@
 		};
 	};
 
+	idle-states {
+		/*
+		 * PSCI node is not added default, U-boot will add missing
+		 * parts if it determines to use PSCI.
+		 */
+		entry-method = "arm,psci";
+
+		CPU_PH20: cpu-ph20 {
+			compatible = "arm,idle-state";
+			idle-state-name = "PH20";
+			arm,psci-suspend-param = <0x00010000>;
+			entry-latency-us = <1000>;
+			exit-latency-us = <1000>;
+			min-residency-us = <3000>;
+		};
+	};
+
 	memory at 80000000 {
 		device_type = "memory";
 		reg = <0x0 0x80000000 0 0x80000000>;
-- 
1.7.1

[PATCH 3/3] arm64: dts: update the cpu idle node

[Ran Wang]

From: Yuantian Tang <andy.tang@nxp.com>

According to PSCI standard v0.2, for CPU_SUSPEND call, which is
used by cpu idle framework, bit[16] of state parameter must be 0.
So update bit[16] of property 'arm,psci-suspend-param', which is
used as state parameter, to 0.

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
---
 arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi |    2 +-
 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi |    2 +-
 arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi |    2 +-
 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi |    2 +-
 arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi |    2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
index 15421ef..3463b09 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
@@ -84,7 +84,7 @@
 		CPU_PH20: cpu-ph20 {
 			compatible = "arm,idle-state";
 			idle-state-name = "PH20";
-			arm,psci-suspend-param = <0x00010000>;
+			arm,psci-suspend-param = <0x0>;
 			entry-latency-us = <1000>;
 			exit-latency-us = <1000>;
 			min-residency-us = <3000>;
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index 18828b9..82ca0d9 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -126,7 +126,7 @@
 		CPU_PH20: cpu-ph20 {
 			compatible = "arm,idle-state";
 			idle-state-name = "PH20";
-			arm,psci-suspend-param = <0x00010000>;
+			arm,psci-suspend-param = <0x0>;
 			entry-latency-us = <1000>;
 			exit-latency-us = <1000>;
 			min-residency-us = <3000>;
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index 06b5e12..2c56f9d 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -122,7 +122,7 @@
 		CPU_PH20: cpu-ph20 {
 			compatible = "arm,idle-state";
 			idle-state-name = "PH20";
-			arm,psci-suspend-param = <0x00010000>;
+			arm,psci-suspend-param = <0x0>;
 			entry-latency-us = <1000>;
 			exit-latency-us = <1000>;
 			min-residency-us = <3000>;
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index 8ff2688..fa6820b 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -130,7 +130,7 @@
 		CPU_PH20: cpu-ph20 {
 			compatible = "arm,idle-state";
 			idle-state-name = "PH20";
-			arm,psci-suspend-param = <0x00010000>;
+			arm,psci-suspend-param = <0x0>;
 			entry-latency-us = <1000>;
 			exit-latency-us = <1000>;
 			min-residency-us = <3000>;
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
index aeaef01..0884e1a 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
@@ -143,7 +143,7 @@
 	CPU_PW20: cpu-pw20 {
 		compatible = "arm,idle-state";
 		idle-state-name = "PW20";
-		arm,psci-suspend-param = <0x00010000>;
+		arm,psci-suspend-param = <0x0>;
 		entry-latency-us = <2000>;
 		exit-latency-us = <2000>;
 		min-residency-us = <6000>;
-- 
1.7.1

[PATCH 3/3] arm64: dts: update the cpu idle node

[Sudeep Holla]

(sorry for replying so late, just found this by accident when clearing
 old emails)

On 08/02/18 07:54, Ran Wang wrote:
> From: Yuantian Tang <andy.tang@nxp.com>
> 
> According to PSCI standard v0.2, for CPU_SUSPEND call, which is
> used by cpu idle framework, bit[16] of state parameter must be 0.
> So update bit[16] of property 'arm,psci-suspend-param', which is
> used as state parameter, to 0.
> 
This changelog makes zero sense to me.

1. PSCI specification makes no reference to "cpu idle framework".
   It's not a Linux specification to reference anything specific to
   Linux CPUIdle framework.

2. "for CPU_SUSPEND call,...bit[16] of state parameter must be 0."
   Where exactly to you see that ? Specification tells what value of
   0 or 1 in bit[16] means.

3. Is this retention state and doesn't need any save restore ? If not
   this change is wrong and will break if and when we use
   CPU_PM_CPU_IDLE_ENTER_RETENTION if this bit is not set.

-- 
Regards,
Sudeep

[PATCH 1/3] arm64: dts: ls1012a: add cpu idle support

[Shawn Guo]

On Thu, Feb 08, 2018 at 03:54:34PM +0800, Ran Wang wrote:
> From: Yuantian Tang <andy.tang@nxp.com>
> 
> Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi |   18 ++++++++++++++++++
>  1 files changed, 18 insertions(+), 0 deletions(-)

Applied all, thanks.

[PATCH 1/3] arm64: dts: ls1012a: add cpu idle support

[Shawn Guo]

On Sat, Feb 24, 2018 at 02:25:16PM +0800, Shawn Guo wrote:
> On Thu, Feb 08, 2018 at 03:54:34PM +0800, Ran Wang wrote:
> > From: Yuantian Tang <andy.tang@nxp.com>
> > 
> > Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
> > ---
> >  arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi |   18 ++++++++++++++++++
> >  1 files changed, 18 insertions(+), 0 deletions(-)
> 
> Applied all, thanks.

Ran,

Just noticed that these patches are authored by Yuantian.  When you send
patches authored by someone else, you should have your SoB added to it.

I just append your SoB below to all 3 patches.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>

Shawn

[PATCH 1/3] arm64: dts: ls1012a: add cpu idle support

[Ran Wang]

Hi Shawn,

> -----Original Message-----
> From: Shawn Guo [mailto:shawnguo at kernel.org]
> Sent: Saturday, February 24, 2018 3:13 PM
> To: Ran Wang <ran.wang_1@nxp.com>
> Cc: Mark Rutland <mark.rutland@arm.com>; devicetree at vger.kernel.org; Andy
> Tang <andy.tang@nxp.com>; Catalin Marinas <catalin.marinas@arm.com>; Will
> Deacon <will.deacon@arm.com>; linux-kernel at vger.kernel.org; Leo Li
> <leoyang.li@nxp.com>; Rob Herring <robh+dt@kernel.org>; linux-arm-
> kernel at lists.infradead.org
> Subject: Re: [PATCH 1/3] arm64: dts: ls1012a: add cpu idle support
> 
> On Sat, Feb 24, 2018 at 02:25:16PM +0800, Shawn Guo wrote:
> > On Thu, Feb 08, 2018 at 03:54:34PM +0800, Ran Wang wrote:
> > > From: Yuantian Tang <andy.tang@nxp.com>
> > >
> > > Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
> > > ---
> > >  arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi |   18 ++++++++++++++++++
> > >  1 files changed, 18 insertions(+), 0 deletions(-)
> >
> > Applied all, thanks.
> 
> Ran,
> 
> Just noticed that these patches are authored by Yuantian.  When you send
> patches authored by someone else, you should have your SoB added to it.
> 
> I just append your SoB below to all 3 patches.
> 
> Signed-off-by: Ran Wang <ran.wang_1@nxp.com>

Got it, thanks!

Ran