From mboxrd@z Thu Jan 1 00:00:00 1970 From: jacob-chen@iotwrt.com (Jacob Chen) Date: Thu, 8 Mar 2018 17:48:06 +0800 Subject: [PATCH v6 16/17] arm64: dts: rockchip: add rx0 mipi-phy for rk3399 In-Reply-To: <20180308094807.9443-1-jacob-chen@iotwrt.com> References: <20180308094807.9443-1-jacob-chen@iotwrt.com> Message-ID: <20180308094807.9443-17-jacob-chen@iotwrt.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org From: Shunqian Zheng It's a Designware MIPI D-PHY, used for ISP0 in rk3399. Signed-off-by: Shunqian Zheng Signed-off-by: Jacob Chen --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 14ed016f2fdd..d18ab8f56ef2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1308,6 +1308,16 @@ status = "disabled"; }; + mipi_dphy_rx0: mipi-dphy-rx0 { + compatible = "rockchip,rk3399-mipi-dphy"; + clocks = <&cru SCLK_MIPIDPHY_REF>, + <&cru SCLK_DPHY_RX0_CFG>, + <&cru PCLK_VIO_GRF>; + clock-names = "dphy-ref", "dphy-cfg", "grf"; + power-domains = <&power RK3399_PD_VIO>; + status = "disabled"; + }; + u2phy0: usb2-phy at e450 { compatible = "rockchip,rk3399-usb2phy"; reg = <0xe450 0x10>; -- 2.16.1