From: alex.shi@linaro.org (Alex Shi)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 25/39] arm/arm64: KVM: Add smccc accessors to PSCI code
Date: Fri, 9 Mar 2018 17:07:08 +0800 [thread overview]
Message-ID: <20180309090722.26279-26-alex.shi@linaro.org> (raw)
In-Reply-To: <20180309090722.26279-1-alex.shi@linaro.org>
From: Marc Zyngier <marc.zyngier@arm.com>
commit 84684fecd7ea upstream.
Instead of open coding the accesses to the various registers,
let's add explicit SMCCC accessors.
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Alex Shi <alex.shi@linaro.org>
---
arch/arm/kvm/psci.c | 52 ++++++++++++++++++++++++++++++++++++---------
1 file changed, 42 insertions(+), 10 deletions(-)
diff --git a/arch/arm/kvm/psci.c b/arch/arm/kvm/psci.c
index 85fc21b43f6f..946acf69a021 100644
--- a/arch/arm/kvm/psci.c
+++ b/arch/arm/kvm/psci.c
@@ -33,6 +33,38 @@
#define AFFINITY_MASK(level) ~((0x1UL << ((level) * MPIDR_LEVEL_BITS)) - 1)
+static u32 smccc_get_function(struct kvm_vcpu *vcpu)
+{
+ return vcpu_get_reg(vcpu, 0);
+}
+
+static unsigned long smccc_get_arg1(struct kvm_vcpu *vcpu)
+{
+ return vcpu_get_reg(vcpu, 1);
+}
+
+static unsigned long smccc_get_arg2(struct kvm_vcpu *vcpu)
+{
+ return vcpu_get_reg(vcpu, 2);
+}
+
+static unsigned long smccc_get_arg3(struct kvm_vcpu *vcpu)
+{
+ return vcpu_get_reg(vcpu, 3);
+}
+
+static void smccc_set_retval(struct kvm_vcpu *vcpu,
+ unsigned long a0,
+ unsigned long a1,
+ unsigned long a2,
+ unsigned long a3)
+{
+ vcpu_set_reg(vcpu, 0, a0);
+ vcpu_set_reg(vcpu, 1, a1);
+ vcpu_set_reg(vcpu, 2, a2);
+ vcpu_set_reg(vcpu, 3, a3);
+}
+
static unsigned long psci_affinity_mask(unsigned long affinity_level)
{
if (affinity_level <= 3)
@@ -75,7 +107,7 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
unsigned long context_id;
phys_addr_t target_pc;
- cpu_id = vcpu_get_reg(source_vcpu, 1) & MPIDR_HWID_BITMASK;
+ cpu_id = smccc_get_arg1(source_vcpu) & MPIDR_HWID_BITMASK;
if (vcpu_mode_is_32bit(source_vcpu))
cpu_id &= ~((u32) 0);
@@ -94,8 +126,8 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
return PSCI_RET_INVALID_PARAMS;
}
- target_pc = vcpu_get_reg(source_vcpu, 2);
- context_id = vcpu_get_reg(source_vcpu, 3);
+ target_pc = smccc_get_arg2(source_vcpu);
+ context_id = smccc_get_arg3(source_vcpu);
kvm_reset_vcpu(vcpu);
@@ -114,7 +146,7 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
* NOTE: We always update r0 (or x0) because for PSCI v0.1
* the general puspose registers are undefined upon CPU_ON.
*/
- vcpu_set_reg(vcpu, 0, context_id);
+ smccc_set_retval(vcpu, context_id, 0, 0, 0);
vcpu->arch.power_off = false;
smp_mb(); /* Make sure the above is visible */
@@ -134,8 +166,8 @@ static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
struct kvm *kvm = vcpu->kvm;
struct kvm_vcpu *tmp;
- target_affinity = vcpu_get_reg(vcpu, 1);
- lowest_affinity_level = vcpu_get_reg(vcpu, 2);
+ target_affinity = smccc_get_arg1(vcpu);
+ lowest_affinity_level = smccc_get_arg2(vcpu);
/* Determine target affinity mask */
target_affinity_mask = psci_affinity_mask(lowest_affinity_level);
@@ -209,7 +241,7 @@ int kvm_psci_version(struct kvm_vcpu *vcpu)
static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
{
struct kvm *kvm = vcpu->kvm;
- unsigned long psci_fn = vcpu_get_reg(vcpu, 0) & ~((u32) 0);
+ u32 psci_fn = smccc_get_function(vcpu);
unsigned long val;
int ret = 1;
@@ -276,14 +308,14 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
break;
}
- vcpu_set_reg(vcpu, 0, val);
+ smccc_set_retval(vcpu, val, 0, 0, 0);
return ret;
}
static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
{
struct kvm *kvm = vcpu->kvm;
- unsigned long psci_fn = vcpu_get_reg(vcpu, 0) & ~((u32) 0);
+ u32 psci_fn = smccc_get_function(vcpu);
unsigned long val;
switch (psci_fn) {
@@ -301,7 +333,7 @@ static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
break;
}
- vcpu_set_reg(vcpu, 0, val);
+ smccc_set_retval(vcpu, val, 0, 0, 0);
return 1;
}
--
2.16.2.440.gc6284da
next prev parent reply other threads:[~2018-03-09 9:07 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-09 9:06 spectre backport for LTS 4.4 review Alex Shi
2018-03-09 9:06 ` [PATCH 01/39] mm: Introduce lm_alias Alex Shi
2018-03-09 9:06 ` [PATCH 02/39] arm64: barrier: Add CSDB macros to control data-value prediction Alex Shi
2018-03-09 9:06 ` [PATCH 03/39] arm64: Implement array_index_mask_nospec() Alex Shi
2018-03-09 9:06 ` [PATCH 04/39] arm64: move TASK_* definitions to <asm/processor.h> Alex Shi
2018-03-09 9:06 ` [PATCH 05/39] arm64: Make USER_DS an inclusive limit Alex Shi
2018-03-09 9:06 ` [PATCH 06/39] arm64: entry: Ensure branch through syscall table is bounded under speculation Alex Shi
2018-03-09 9:06 ` [PATCH 07/39] arm64: Use pointer masking to limit uaccess speculation Alex Shi
2018-03-09 9:06 ` [PATCH 08/39] arm64: uaccess: Prevent speculative use of the current addr_limit Alex Shi
2018-03-09 9:06 ` [PATCH 09/39] arm64: uaccess: Don't bother eliding access_ok checks in __{get, put}_user Alex Shi
2018-03-09 9:06 ` [PATCH 10/39] arm64: futex: Mask __user pointers prior to dereference Alex Shi
2018-03-09 9:06 ` [PATCH 11/39] drivers/firmware: Expose psci_get_version through psci_ops structure Alex Shi
2018-03-09 9:06 ` [PATCH 12/39] arm64: Move post_ttbr_update_workaround to C code Alex Shi
2018-03-09 9:06 ` [PATCH 13/39] arm64: Add skeleton to harden the branch predictor against aliasing attacks Alex Shi
2018-03-09 9:06 ` [PATCH 14/39] arm64: Move BP hardening to check_and_switch_context Alex Shi
2018-03-09 9:06 ` [PATCH 15/39] arm64: KVM: Use per-CPU vector when BP hardening is enabled Alex Shi
2018-03-09 9:06 ` [PATCH 16/39] arm64: entry: Apply BP hardening for high-priority synchronous exceptions Alex Shi
2018-03-09 9:07 ` [PATCH 17/39] arm64: entry: Apply BP hardening for suspicious interrupts from EL0 Alex Shi
2018-03-09 9:07 ` [PATCH 18/39] arm64: cpu_errata: Allow an erratum to be match for all revisions of a core Alex Shi
2018-03-09 9:07 ` [PATCH 19/39] arm64: prefetch: add alternative pattern for CPUs without a prefetcher Alex Shi
2018-03-09 9:07 ` [PATCH 20/39] arm64: cputype: Add missing MIDR values for Cortex-A72 and Cortex-A75 Alex Shi
2018-03-09 9:07 ` [PATCH 21/39] arm64: Implement branch predictor hardening for affected Cortex-A CPUs Alex Shi
2018-03-09 9:07 ` [PATCH 22/39] arm64: KVM: Increment PC after handling an SMC trap Alex Shi
2018-03-09 9:07 ` [PATCH 23/39] arm/arm64: KVM: Consolidate the PSCI include files Alex Shi
2018-03-09 9:07 ` [PATCH 24/39] arm/arm64: KVM: Add PSCI_VERSION helper Alex Shi
2018-03-09 9:07 ` Alex Shi [this message]
2018-03-09 9:07 ` [PATCH 26/39] arm/arm64: KVM: Implement PSCI 1.0 support Alex Shi
2018-03-09 9:07 ` [PATCH 27/39] ARM: 8478/2: arm/arm64: add arm-smccc Alex Shi
2018-03-09 9:07 ` [PATCH 28/39] ARM: 8479/2: add implementation for arm-smccc Alex Shi
2018-03-09 9:07 ` [PATCH 29/39] ARM: 8480/2: arm64: " Alex Shi
2018-03-09 9:07 ` [PATCH 30/39] ARM: 8481/2: drivers: psci: replace psci firmware calls Alex Shi
2018-03-09 9:07 ` [PATCH 31/39] arm/arm64: KVM: Advertise SMCCC v1.1 Alex Shi
2018-03-09 9:07 ` [PATCH 32/39] arm/arm64: KVM: Turn kvm_psci_version into a static inline Alex Shi
2018-03-09 9:07 ` [PATCH 33/39] arm64: KVM: Report SMCCC_ARCH_WORKAROUND_1 BP hardening support Alex Shi
2018-03-09 9:07 ` [PATCH 34/39] arm64: KVM: Add SMCCC_ARCH_WORKAROUND_1 fast handling Alex Shi
2018-03-09 9:07 ` [PATCH 35/39] firmware/psci: Expose PSCI conduit Alex Shi
2018-03-09 9:07 ` [PATCH 36/39] firmware/psci: Expose SMCCC version through psci_ops Alex Shi
2018-03-09 9:07 ` [PATCH 37/39] arm/arm64: smccc: Make function identifiers an unsigned quantity Alex Shi
2018-03-09 9:07 ` [PATCH 38/39] arm/arm64: smccc: Implement SMCCC v1.1 inline primitive Alex Shi
2018-03-09 9:07 ` [PATCH 39/39] arm64: Add ARM_SMCCC_ARCH_WORKAROUND_1 BP hardening support Alex Shi
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