From mboxrd@z Thu Jan 1 00:00:00 1970 From: maxime.ripard@bootlin.com (Maxime Ripard) Date: Sun, 18 Mar 2018 21:16:18 +0100 Subject: [PATCH v4 4/9] pinctrl: sunxi: add support for the Allwinner H6 main pin controller In-Reply-To: <20180316140215.28663-5-icenowy@aosc.io> References: <20180316140215.28663-1-icenowy@aosc.io> <20180316140215.28663-5-icenowy@aosc.io> Message-ID: <20180318201618.wk6ypgjljhkwpei7@flea> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Fri, Mar 16, 2018 at 10:02:10PM +0800, Icenowy Zheng wrote: > The Allwinner H6 SoC has two pin controllers, one main controller > (called CPUX-PORT in user manual) and one controller in CPUs power > domain (called CPUS-PORT in user manual). > > This commit introduces support for the main pin controller on H6. > > The pin bank A and B are not wired out and hidden from the SoC's > documents, however it's shown that the "ATE" (an AC200 chip > co-packaged with the H6 die) is connected to the main SoC die via these > pin banks. The information about these banks is just copied from the BSP > pinctrl driver, but re-formatted to fit the mainline pinctrl driver > format. The GPIO functions are dropped, as they're impossible to use -- > except a GPIO&IRQ only pin (PB20) which might be the IRQ of ATE. > > Signed-off-by: Icenowy Zheng > Acked-by: Rob Herring Acked-by: Maxime Ripard Maxime -- Maxime Ripard, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering https://bootlin.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 833 bytes Desc: not available URL: