From mboxrd@z Thu Jan  1 00:00:00 1970
From: alexandre.belloni@bootlin.com (Alexandre Belloni)
Date: Wed, 28 Mar 2018 17:50:33 +0200
Subject: [PATCH v3 0/6] clocksource: rework Atmel TCB timer driver
In-Reply-To: <20180328153135.GG13942@piout.net>
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Message-ID: <20180328155033.GH13942@piout.net>
To: linux-arm-kernel@lists.infradead.org
List-Id: linux-arm-kernel.lists.infradead.org

On 28/03/2018 at 17:31:35 +0200, Alexandre Belloni wrote:
> > Do you have an explanation of why the rate is much higher ?
> > 
> 
> The core is giving deltas of 31 clocks instead of much more than that, I
> guess I messed up the initialization somewhere.
> 

I did mess up.

Alexander, can you test that:

diff --git a/drivers/clocksource/timer-atmel-tcb.c b/drivers/clocksource/timer-atmel-tcb.c
index 7fde9cfbf203..bbbacf8c46b0 100644
--- a/drivers/clocksource/timer-atmel-tcb.c
+++ b/drivers/clocksource/timer-atmel-tcb.c
@@ -222,7 +222,7 @@ static int __init tc_clkevt_register(struct device_node *node,
 		goto err_slow;
 	clk_disable(tce.clk);
 
-	clockevents_config_and_register(&tce.clkevt, 32768, 1, bits - 1);
+	clockevents_config_and_register(&tce.clkevt, 32768, 1, BIT(bits) - 1);
 
 	ret = request_irq(tce.irq, tc_clkevt2_irq, IRQF_TIMER | IRQF_SHARED,
 			  tce.clkevt.name, &tce);

This will behave exactly the same as before on 16bits TCB and will have
much less interrupts on 32 bits platforms.

-- 
Alexandre Belloni, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com