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From: maxime.ripard@bootlin.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 3/6] spi: sun6i: restrict transfer length in PIO-mode
Date: Mon, 9 Apr 2018 11:27:30 +0200	[thread overview]
Message-ID: <20180409092730.2moyhl5aaktjwbyn@flea> (raw)
In-Reply-To: <204e97cb-2f39-00f0-fd4e-3aa9a51f7cac@orpaltech.com>

On Fri, Apr 06, 2018 at 06:48:23PM +0300, Sergey Suloev wrote:
> On 04/06/2018 10:34 AM, Maxime Ripard wrote:
> > On Thu, Apr 05, 2018 at 04:44:16PM +0300, Sergey Suloev wrote:
> > > On 04/05/2018 04:17 PM, Mark Brown wrote:
> > > > On Thu, Apr 05, 2018 at 12:59:35PM +0300, Sergey Suloev wrote:
> > > > > On 04/05/2018 12:19 PM, Maxime Ripard wrote:
> > > > > > The point of that patch was precisely to allow to send more data than
> > > > > > the FIFO. You're breaking that behaviour without any justification,
> > > > > > and this is not ok.
> > > > > I am sorry, but you can't. That's a hardware limitation.
> > > > Are you positive about that?  Normally you can add things to hardware
> > > > FIFOs while they're being drained so so long as you can keep data
> > > > flowing in at least as fast as it's being consumed.
> > > Well, normally yes, but this is not the case with the hardware that I own.
> > > My a20 (BPiM1+) and a31 (BPiM2) boards behaves differently. With a transfer
> > > larger than FIFO then TC interrupt never happens.
> > Because you're not supposed to have a transfer larger than the FIFO,
> > but to have to setup at first a transfer the size of the FIFO, and
> > then when it's (or starts to be) depleted, fill it up again.
> 
> According to what you said the driver must implement
> "transfer_one_message" instead of "transfer_one"

I'm not sure what makes you think that I said that.

Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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  reply	other threads:[~2018-04-09  9:27 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-03 15:44 [PATCH v3 0/6] spi: Add support for DMA transfers in sun6i SPI driver Sergey Suloev
2018-04-03 15:44 ` [PATCH v3 1/6] spi: sun6i: coding style/readability improvements Sergey Suloev
2018-04-04  6:45   ` Maxime Ripard
2018-04-03 15:44 ` [PATCH v3 2/6] spi: sun6i: handle chip select polarity flag Sergey Suloev
2018-04-03 15:44 ` [PATCH v3 3/6] spi: sun6i: restrict transfer length in PIO-mode Sergey Suloev
2018-04-04  6:50   ` Maxime Ripard
2018-04-04 11:35     ` Sergey Suloev
2018-04-05  9:19       ` Maxime Ripard
2018-04-05  9:59         ` Sergey Suloev
2018-04-05 13:17           ` Mark Brown
2018-04-05 13:44             ` Sergey Suloev
2018-04-06  7:34               ` Maxime Ripard
2018-04-06 15:48                 ` Sergey Suloev
2018-04-09  9:27                   ` Maxime Ripard [this message]
2018-04-09 10:26                     ` Sergey Suloev
2018-04-09 10:50                       ` Mark Brown
2018-04-09 11:10                         ` Sergey Suloev
2018-04-09 11:27                           ` Mark Brown
2018-04-09 11:36                           ` Maxime Ripard
2018-04-09 11:59                             ` Sergey Suloev
2018-04-10 14:05                               ` Maxime Ripard
2018-04-06 15:54                 ` Sergey Suloev
2018-04-05 10:07         ` Mark Brown
2018-04-03 15:44 ` [PATCH v3 4/6] spi: sun6i: use completion provided by SPI core Sergey Suloev
2018-04-04  6:53   ` Maxime Ripard
2018-04-03 15:44 ` [PATCH v3 5/6] spi: sun6i: introduce register set/unset helpers Sergey Suloev
2018-04-04  1:32   ` kbuild test robot
2018-04-04  7:02   ` Maxime Ripard
2018-04-03 15:44 ` [PATCH v3 6/6] spi: sun6i: add DMA transfers support Sergey Suloev
2018-04-04  7:00   ` Maxime Ripard

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