From: sebastien.szymanski@armadeus.com (Sébastien Szymanski)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 2/2] ARM: dts: imx6ull: add operating points
Date: Thu, 19 Apr 2018 09:19:42 +0200 [thread overview]
Message-ID: <20180419071942.14828-2-sebastien.szymanski@armadeus.com> (raw)
In-Reply-To: <20180419071942.14828-1-sebastien.szymanski@armadeus.com>
i.MX6ULL has different operating ranges than i.MX6UL so add the
operating points for the i.MX6ULL. A 25mV offset is added to the minimum
allowed values like for the i.MX6UL.
Signed-off-by: S?bastien Szymanski <sebastien.szymanski@armadeus.com>
---
Changes for v2:
- Fix soc-operating-points voltage for 792MHz and 900MHz
arch/arm/boot/dts/imx6ull.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
index 571ddd71cdba..530d5526b890 100644
--- a/arch/arm/boot/dts/imx6ull.dtsi
+++ b/arch/arm/boot/dts/imx6ull.dtsi
@@ -46,6 +46,25 @@
/* Delete UART8 in AIPS-1 (i.MX6UL specific) */
/delete-node/ &uart8;
+&cpu0 {
+ operating-points = <
+ /* kHz uV */
+ 900000 1275000
+ 792000 1225000
+ 528000 1175000
+ 396000 1025000
+ 198000 950000
+ >;
+ fsl,soc-operating-points = <
+ /* KHz uV */
+ 900000 1175000
+ 792000 1175000
+ 528000 1175000
+ 396000 1175000
+ 198000 1175000
+ >;
+};
+
/ {
soc {
aips3: aips-bus at 2200000 {
--
2.16.1
next prev parent reply other threads:[~2018-04-19 7:19 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-19 7:19 [PATCH v2 1/2] cpufreq: imx6q: check speed grades for i.MX6ULL Sébastien Szymanski
2018-04-19 7:19 ` Sébastien Szymanski [this message]
2018-04-19 9:09 ` Viresh Kumar
2018-05-22 6:13 ` Sébastien Szymanski
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