linux-arm-kernel.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
* [PACTCH v5 2/2] ARM: dts: imx: Add basic dts support for imx6sll EVK board
       [not found] <1523606464-21561-1-git-send-email-ping.bai@nxp.com>
@ 2018-04-13  8:01 ` Bai Ping
  2018-05-02  6:58   ` Shawn Guo
  2018-05-02  6:55 ` [PACTCH v5 1/2] ARM: dts: imx: Add basic dtsi file for imx6sll Shawn Guo
  1 sibling, 1 reply; 4+ messages in thread
From: Bai Ping @ 2018-04-13  8:01 UTC (permalink / raw)
  To: linux-arm-kernel

Add dts file support for imx6sll EVK board.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
 change v3->v4
 - update the license indentifier
 - remove leading zero of node
 - remove unused pin from hog group
 change v4->v5
 - use generic name for device node
 - remove unnecessary hog pin group
---
 Documentation/devicetree/bindings/arm/fsl.txt |   4 +
 arch/arm/boot/dts/Makefile                    |   2 +
 arch/arm/boot/dts/imx6sll-evk.dts             | 315 ++++++++++++++++++++++++++
 3 files changed, 321 insertions(+)
 create mode 100644 arch/arm/boot/dts/imx6sll-evk.dts

diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
index cdb9dd7..8a1baa2 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -53,6 +53,10 @@ i.MX6 Quad SABRE Automotive Board
 Required root node properties:
     - compatible = "fsl,imx6q-sabreauto", "fsl,imx6q";
 
+i.MX6SLL EVK board
+Required root node properties:
+    - compatible = "fsl,imx6sll-evk", "fsl,imx6sll";
+
 Generic i.MX boards
 -------------------
 
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index ade7a38..28bff8b 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -505,6 +505,8 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
 dtb-$(CONFIG_SOC_IMX6SL) += \
 	imx6sl-evk.dtb \
 	imx6sl-warp.dtb
+dtb-$(CONFIG_SOC_IMX6SLL) += \
+	imx6sll-evk.dtb
 dtb-$(CONFIG_SOC_IMX6SX) += \
 	imx6sx-nitrogen6sx.dtb \
 	imx6sx-sabreauto.dtb \
diff --git a/arch/arm/boot/dts/imx6sll-evk.dts b/arch/arm/boot/dts/imx6sll-evk.dts
new file mode 100644
index 0000000..0cfa4a2
--- /dev/null
+++ b/arch/arm/boot/dts/imx6sll-evk.dts
@@ -0,0 +1,315 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2016 Freescale Semiconductor, Inc.
+ * Copyright 2017-2018 NXP.
+ *
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include "imx6sll.dtsi"
+
+/ {
+	model = "Freescale i.MX6SLL EVK Board";
+	compatible = "fsl,imx6sll-evk", "fsl,imx6sll";
+
+	memory at 80000000 {
+		reg = <0x80000000 0x80000000>;
+	};
+
+	backlight {
+		compatible = "pwm-backlight";
+		pwms = <&pwm1 0 5000000>;
+		brightness-levels = <0 4 8 16 32 64 128 255>;
+		default-brightness-level = <6>;
+		status = "okay";
+	};
+
+	reg_usb_otg1_vbus: regulator-otg1-vbus {
+		compatible = "regulator-fixed";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_usb_otg1_vbus>;
+		regulator-name = "usb_otg1_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&gpio4 0 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
+	reg_usb_otg2_vbus: regulator-otg2-vbus {
+		compatible = "regulator-fixed";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_usb_otg2_vbus>;
+		regulator-name = "usb_otg2_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
+	reg_aud3v: regulator-aud3v {
+		compatible = "regulator-fixed";
+		regulator-name = "wm8962-supply-3v15";
+		regulator-min-microvolt = <3150000>;
+		regulator-max-microvolt = <3150000>;
+		regulator-boot-on;
+	};
+
+	reg_aud4v: regulator-aud4v {
+		compatible = "regulator-fixed";
+		regulator-name = "wm8962-supply-4v2";
+		regulator-min-microvolt = <4325000>;
+		regulator-max-microvolt = <4325000>;
+		regulator-boot-on;
+	};
+
+	reg_lcd: regulator-lcd {
+		compatible = "regulator-fixed";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_reg_lcd>;
+		regulator-name = "lcd-pwr";
+		gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
+	reg_sd1_vmmc: regulator-sd1-vmmc {
+		compatible = "regulator-fixed";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_reg_sd1_vmmc>;
+		regulator-name = "SD1_SPWR";
+		regulator-min-microvolt = <3000000>;
+		regulator-max-microvolt = <3000000>;
+		gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+};
+
+&cpu0 {
+	arm-supply = <&sw1a_reg>;
+	soc-supply = <&sw1c_reg>;
+};
+
+&i2c1 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c1>;
+	status = "okay";
+
+	pfuze100: pmic at 8 {
+		compatible = "fsl,pfuze100";
+		reg = <0x08>;
+
+		regulators {
+			sw1a_reg: sw1ab {
+				regulator-min-microvolt = <300000>;
+				regulator-max-microvolt = <1875000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-ramp-delay = <6250>;
+			};
+
+			sw1c_reg: sw1c {
+				regulator-min-microvolt = <300000>;
+				regulator-max-microvolt = <1875000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-ramp-delay = <6250>;
+			};
+
+			sw2_reg: sw2 {
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			sw3a_reg: sw3a {
+				regulator-min-microvolt = <400000>;
+				regulator-max-microvolt = <1975000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			sw3b_reg: sw3b {
+				regulator-min-microvolt = <400000>;
+				regulator-max-microvolt = <1975000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			sw4_reg: sw4 {
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			swbst_reg: swbst {
+				regulator-min-microvolt = <5000000>;
+				regulator-max-microvolt = <5150000>;
+			};
+
+			snvs_reg: vsnvs {
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			vref_reg: vrefddr {
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			vgen1_reg: vgen1 {
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <1550000>;
+				regulator-always-on;
+			};
+
+			vgen2_reg: vgen2 {
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <1550000>;
+			};
+
+			vgen3_reg: vgen3 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			vgen4_reg: vgen4 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+
+			vgen5_reg: vgen5 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+
+			vgen6_reg: vgen6 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+		};
+	};
+};
+
+&iomuxc {
+	pinctrl_usb_otg1_vbus: vbus1grp {
+		fsl,pins = <
+			MX6SLL_PAD_KEY_COL4__GPIO4_IO00 0x17059
+		>;
+	};
+
+	pinctrl_usb_otg2_vbus: vbus2grp {
+		fsl,pins = <
+			MX6SLL_PAD_KEY_COL5__GPIO4_IO02 0x17059
+		>;
+	};
+
+	pinctrl_reg_lcd: reglcdgrp {
+		fsl,pins = <
+			MX6SLL_PAD_ECSPI1_SCLK__GPIO4_IO08 0x17059
+		>;
+	};
+
+	pinctrl_reg_sd1_vmmc: sd1vmmcgrp {
+		fsl,pins = <
+			MX6SLL_PAD_KEY_COL3__GPIO3_IO30 0x17059
+		>;
+	};
+
+	pinctrl_uart1: uart1grp {
+		fsl,pins = <
+			MX6SLL_PAD_UART1_TXD__UART1_DCE_TX 0x1b0b1
+			MX6SLL_PAD_UART1_RXD__UART1_DCE_RX 0x1b0b1
+		>;
+	};
+
+	pinctrl_usdhc1: usdhc1grp {
+		fsl,pins = <
+			MX6SLL_PAD_SD1_CMD__SD1_CMD	0x17059
+			MX6SLL_PAD_SD1_CLK__SD1_CLK	0x13059
+			MX6SLL_PAD_SD1_DATA0__SD1_DATA0	0x17059
+			MX6SLL_PAD_SD1_DATA1__SD1_DATA1	0x17059
+			MX6SLL_PAD_SD1_DATA2__SD1_DATA2	0x17059
+			MX6SLL_PAD_SD1_DATA3__SD1_DATA3	0x17059
+		>;
+	};
+
+	pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
+		fsl,pins = <
+			MX6SLL_PAD_SD1_CMD__SD1_CMD	0x170b9
+			MX6SLL_PAD_SD1_CLK__SD1_CLK	0x130b9
+			MX6SLL_PAD_SD1_DATA0__SD1_DATA0	0x170b9
+			MX6SLL_PAD_SD1_DATA1__SD1_DATA1	0x170b9
+			MX6SLL_PAD_SD1_DATA2__SD1_DATA2	0x170b9
+			MX6SLL_PAD_SD1_DATA3__SD1_DATA3	0x170b9
+		>;
+	};
+
+	pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
+		fsl,pins = <
+			MX6SLL_PAD_SD1_CMD__SD1_CMD	0x170f9
+			MX6SLL_PAD_SD1_CLK__SD1_CLK	0x130f9
+			MX6SLL_PAD_SD1_DATA0__SD1_DATA0	0x170f9
+			MX6SLL_PAD_SD1_DATA1__SD1_DATA1	0x170f9
+			MX6SLL_PAD_SD1_DATA2__SD1_DATA2	0x170f9
+			MX6SLL_PAD_SD1_DATA3__SD1_DATA3	0x170f9
+		>;
+	};
+
+	pinctrl_usbotg1: usbotg1grp {
+		fsl,pins = <
+			MX6SLL_PAD_EPDC_PWR_COM__USB_OTG1_ID 0x17059
+		>;
+	};
+
+	pinctrl_i2c1: i2c1grp {
+		fsl,pins = <
+			MX6SLL_PAD_I2C1_SCL__I2C1_SCL	 0x4001b8b1
+			MX6SLL_PAD_I2C1_SDA__I2C1_SDA	 0x4001b8b1
+		>;
+	};
+};
+
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart1>;
+	status = "okay";
+};
+
+&usdhc1 {
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc1>;
+	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+	cd-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
+	wp-gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
+	keep-power-in-suspend;
+	wakeup-source;
+	vmmc-supply = <&reg_sd1_vmmc>;
+	status = "okay";
+};
+
+&usbotg1 {
+	vbus-supply = <&reg_usb_otg1_vbus>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usbotg1>;
+	disable-over-current;
+	srp-disable;
+	hnp-disable;
+	adp-disable;
+	status = "okay";
+};
+
+&usbotg2 {
+	vbus-supply = <&reg_usb_otg2_vbus>;
+	dr_mode = "host";
+	disable-over-current;
+	status = "okay";
+};
-- 
1.9.1

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [PACTCH v5 1/2] ARM: dts: imx: Add basic dtsi file for imx6sll
       [not found] <1523606464-21561-1-git-send-email-ping.bai@nxp.com>
  2018-04-13  8:01 ` [PACTCH v5 2/2] ARM: dts: imx: Add basic dts support for imx6sll EVK board Bai Ping
@ 2018-05-02  6:55 ` Shawn Guo
  2018-05-08  7:52   ` Jacky Bai
  1 sibling, 1 reply; 4+ messages in thread
From: Shawn Guo @ 2018-05-02  6:55 UTC (permalink / raw)
  To: linux-arm-kernel

On Fri, Apr 13, 2018 at 04:01:03PM +0800, Bai Ping wrote:
> Add dtsi file for imx6sll.
> 
> Signed-off-by: Bai Ping <ping.bai@nxp.com>
> Reviewed-by: Rob Herring <robh@kernel.org>
> ---
>  change v3->v4
>  - update the license indentifier
>  - remove leading zeros of node
>  - move pin header to this patch
>  change v4->v5
>  - use generic name for device node
> ---
>  arch/arm/boot/dts/imx6sll-pinfunc.h | 880 ++++++++++++++++++++++++++++++++++++
>  arch/arm/boot/dts/imx6sll.dtsi      | 802 ++++++++++++++++++++++++++++++++
>  2 files changed, 1682 insertions(+)
>  create mode 100644 arch/arm/boot/dts/imx6sll-pinfunc.h
>  create mode 100644 arch/arm/boot/dts/imx6sll.dtsi

<snip>

> +
> +			epit1: epit at 20d0000 {
> +				reg = <0x020d0000 0x4000>;
> +				interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
> +			};
> +
> +			epit2: epit at 20d4000 {
> +				reg = <0x020d4000 0x4000>;
> +				interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
> +			};

'timer' for node name.  If these devices are not used, I would even
suggest to drop them.

> +
> +			src: reset-controller at 20d8000 {
> +				compatible = "fsl,imx6sll-src";
> +				reg = <0x020d8000 0x4000>;
> +				interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
> +					     <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
> +				#reset-cells = <1>;
> +			};
> +
> +			gpc: interrupt-controller at 20dc000 {
> +				compatible = "fsl,imx6sll-gpc", "fsl,imx6q-gpc";
> +				reg = <0x020dc000 0x4000>;
> +				interrupt-controller;
> +				#interrupt-cells = <3>;
> +				interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
> +				interrupt-parent = <&intc>;
> +				fsl,mf-mix-wakeup-irq = <0x7c00000 0x7d00 0x0 0x1400640>;
> +			};
> +
> +			iomuxc: pinctrl at 20e0000 {
> +				compatible = "fsl,imx6sll-iomuxc";
> +				reg = <0x020e0000 0x4000>;
> +			};
> +
> +			gpr: iomuxc-gpr at 20e4000 {
> +				compatible = "fsl,imx6sll-iomuxc-gpr",
> +					     "fsl,imx6q-iomuxc-gpr", "syscon";
> +				reg = <0x020e4000 0x4000>;
> +			};
> +
> +			csi: csi at 20e8000 {
> +				compatible = "fsl,imx6sll-csi", "fsl,imx6s-csi";
> +				reg = <0x020e8000 0x4000>;
> +				interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6SLL_CLK_DUMMY>,
> +					 <&clks IMX6SLL_CLK_CSI>,
> +					 <&clks IMX6SLL_CLK_DUMMY>;
> +				clock-names = "disp-axi", "csi_mclk", "disp_dcic";
> +				status = "disabled";
> +			};
> +
> +			sdma: dma-controller at 20ec000 {
> +				compatible = "fsl,imx6sll-sdma", "fsl,imx35-sdma";
> +				reg = <0x020ec000 0x4000>;
> +				interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6SLL_CLK_SDMA>,
> +					 <&clks IMX6SLL_CLK_SDMA>;
> +				clock-names = "ipg", "ahb";
> +				#dma-cells = <3>;
> +				iram = <&ocram>;
> +				fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
> +			};
> +
> +			lcdif: lcd-controller at 20f8000 {
> +				compatible = "fsl,imx6sll-lcdif", "fsl,imx28-lcdif";
> +				reg = <0x020f8000 0x4000>;
> +				interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6SLL_CLK_LCDIF_PIX>,
> +					 <&clks IMX6SLL_CLK_LCDIF_APB>,
> +					 <&clks IMX6SLL_CLK_DUMMY>;
> +				clock-names = "pix", "axi", "disp_axi";
> +				status = "disabled";
> +			};
> +
> +			dcp: dcp at 20fc000 {
> +				compatible = "fsl,imx6sl-dcp";

Is the compatible supported/documented?

> +				reg = <0x020fc000 0x4000>;
> +				interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
> +					     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
> +					     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6SLL_CLK_DCP>;
> +				clock-names = "dcp";
> +			};
> +		};
> +
> +		aips2: aips-bus at 2100000 {
> +			compatible = "fsl,aips-bus", "simple-bus";
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			reg = <0x02100000 0x100000>;
> +			ranges;
> +
> +			usbotg1: usb at 2184000 {
> +				compatible = "fsl,imx6sll-usb", "fsl,imx6ul-usb",
> +						"fsl,imx27-usb";
> +				reg = <0x02184000 0x200>;
> +				interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6SLL_CLK_USBOH3>;
> +				fsl,usbphy = <&usbphy1>;
> +				fsl,usbmisc = <&usbmisc 0>;
> +				fsl,anatop = <&anatop>;
> +				ahb-burst-config = <0x0>;
> +				tx-burst-size-dword = <0x10>;
> +				rx-burst-size-dword = <0x10>;
> +				status = "disabled";
> +			};
> +
> +			usbotg2: usb at 2184200 {
> +				compatible = "fsl,imx6sll-usb", "fsl,imx6ul-usb",
> +						"fsl,imx27-usb";
> +				reg = <0x02184200 0x200>;
> +				interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6SLL_CLK_USBOH3>;
> +				fsl,usbphy = <&usbphy2>;
> +				fsl,usbmisc = <&usbmisc 1>;
> +				ahb-burst-config = <0x0>;
> +				tx-burst-size-dword = <0x10>;
> +				rx-burst-size-dword = <0x10>;
> +				status = "disabled";
> +			};
> +
> +			usbmisc: usbmisc at 2184800 {
> +				#index-cells = <1>;
> +				compatible = "fsl,imx6sll-usbmisc", "fsl,imx6ul-usbmisc",
> +						"fsl,imx6q-usbmisc";
> +				reg = <0x02184800 0x200>;
> +			};
> +
> +			usdhc1: mmc at 2190000 {
> +				compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-usdhc";
> +				reg = <0x02190000 0x4000>;
> +				interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6SLL_CLK_USDHC1>,
> +					 <&clks IMX6SLL_CLK_USDHC1>,
> +					 <&clks IMX6SLL_CLK_USDHC1>;
> +				clock-names = "ipg", "ahb", "per";
> +				bus-width = <4>;
> +				fsl,tuning-step = <2>;
> +				fsl,tuning-start-tap = <20>;
> +				status = "disabled";
> +			};
> +
> +			usdhc2: mmc at 2194000 {
> +				compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-usdhc";
> +				reg = <0x02194000 0x4000>;
> +				interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6SLL_CLK_USDHC2>,
> +					 <&clks IMX6SLL_CLK_USDHC2>,
> +					 <&clks IMX6SLL_CLK_USDHC2>;
> +				clock-names = "ipg", "ahb", "per";
> +				bus-width = <4>;
> +				fsl,tuning-step = <2>;
> +				fsl,tuning-start-tap = <20>;
> +				status = "disabled";
> +			};
> +
> +			usdhc3: mmc at 2198000 {
> +				compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-usdhc";
> +				reg = <0x02198000 0x4000>;
> +				interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6SLL_CLK_USDHC3>,
> +					 <&clks IMX6SLL_CLK_USDHC3>,
> +					 <&clks IMX6SLL_CLK_USDHC3>;
> +				clock-names = "ipg", "ahb", "per";
> +				bus-width = <4>;
> +				fsl,tuning-step = <2>;
> +				fsl,tuning-start-tap = <20>;
> +				status = "disabled";
> +			};
> +
> +			i2c1: i2c at 21a0000 {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				compatible = "fs,imx6sll-i2c", "fsl,imx21-i2c";
> +				reg = <0x021a0000 0x4000>;
> +				interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6SLL_CLK_I2C1>;
> +				status = "disabled";
> +			};
> +
> +			i2c2: i2c at 21a4000 {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				compatible = "fsl,imx6sll-i2c", "fsl,imx21-i2c";
> +				reg = <0x021a4000 0x4000>;
> +				interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6SLL_CLK_I2C2>;
> +				status = "disabled";
> +			};
> +
> +			i2c3: i2c at 21a8000 {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				compatible = "fsl,imx6sll-i2c", "fsl,imx21-i2c";
> +				reg = <0x021a8000 0x4000>;
> +				interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6SLL_CLK_I2C3>;
> +				status = "disabled";
> +			};
> +
> +			romcp at 21ac000 {
> +				compatible = "fsl,imx6sll-romcp", "syscon";

The compatible "fsl,imx6sll-romcp" is undocumented.  If the device is
not used by upstream kernel, I would even suggest to drop it.

> +				reg = <0x021ac000 0x4000>;
> +			};
> +
> +			mmdc: memory-controller at 21b0000 {
> +				compatible = "fsl,imx6sll-mmdc", "fsl,imx6q-mmdc";
> +				reg = <0x021b0000 0x4000>;
> +			};
> +
> +			rngb: rngb at 21b4000 {

Is the device used at all?

> +				reg = <0x021b4000 0x4000>;
> +				interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks =  <&clks IMX6SLL_CLK_DUMMY>;
> +			};
> +
> +			ocotp: ocotp-ctrl at 21bc000 {
> +				compatible = "fsl,imx6sll-ocotp", "syscon";
> +				reg = <0x021bc000 0x4000>;
> +				clocks = <&clks IMX6SLL_CLK_OCOTP>;
> +			};
> +
> +			snvs_gpr: snvs-gpr at 21c4000 {
> +				reg = <0x021c4000 0x10000>;
> +			};

Ditto

> +
> +			iomuxc_snvs: iomuxc-snvs at 21c8000 {
> +				reg = <0x021c8000 0x10000>;
> +			};

Ditto

Shawn

> +
> +			audmux: audmux at 21d8000 {
> +				compatible = "fsl,imx6sll-audmux", "fsl,imx31-audmux";
> +				reg = <0x021d8000 0x4000>;
> +				status = "disabled";
> +			};
> +
> +			uart5: serial at 21f4000 {
> +				compatible = "fsl,imx6sll-uart", "fsl,imx6q-uart",
> +					     "fsl,imx21-uart";
> +				reg = <0x021f4000 0x4000>;
> +				interrupts =<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
> +				dmas = <&sdma 33 4 0>, <&sdma 34 4 0>;
> +				dma-names = "rx", "tx";
> +				clocks = <&clks IMX6SLL_CLK_UART5_IPG>,
> +					 <&clks IMX6SLL_CLK_UART5_SERIAL>;
> +				clock-names = "ipg", "per";
> +				status = "disabled";
> +			};
> +		};
> +	};
> +};
> -- 
> 1.9.1
> 

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [PACTCH v5 2/2] ARM: dts: imx: Add basic dts support for imx6sll EVK board
  2018-04-13  8:01 ` [PACTCH v5 2/2] ARM: dts: imx: Add basic dts support for imx6sll EVK board Bai Ping
@ 2018-05-02  6:58   ` Shawn Guo
  0 siblings, 0 replies; 4+ messages in thread
From: Shawn Guo @ 2018-05-02  6:58 UTC (permalink / raw)
  To: linux-arm-kernel

On Fri, Apr 13, 2018 at 04:01:04PM +0800, Bai Ping wrote:
> Add dts file support for imx6sll EVK board.
> 
> Signed-off-by: Bai Ping <ping.bai@nxp.com>
> Reviewed-by: Rob Herring <robh@kernel.org>
> ---
>  change v3->v4
>  - update the license indentifier
>  - remove leading zero of node
>  - remove unused pin from hog group
>  change v4->v5
>  - use generic name for device node
>  - remove unnecessary hog pin group
> ---
>  Documentation/devicetree/bindings/arm/fsl.txt |   4 +
>  arch/arm/boot/dts/Makefile                    |   2 +
>  arch/arm/boot/dts/imx6sll-evk.dts             | 315 ++++++++++++++++++++++++++
>  3 files changed, 321 insertions(+)
>  create mode 100644 arch/arm/boot/dts/imx6sll-evk.dts

<snip>

> +/ {
> +	model = "Freescale i.MX6SLL EVK Board";
> +	compatible = "fsl,imx6sll-evk", "fsl,imx6sll";
> +
> +	memory at 80000000 {
> +		reg = <0x80000000 0x80000000>;
> +	};
> +
> +	backlight {
> +		compatible = "pwm-backlight";
> +		pwms = <&pwm1 0 5000000>;
> +		brightness-levels = <0 4 8 16 32 64 128 255>;
> +		default-brightness-level = <6>;
> +		status = "okay";

The "okay" status is used to flip the default disabled device.  It's not
really needed here.

> +	};
> +
> +	reg_usb_otg1_vbus: regulator-otg1-vbus {
> +		compatible = "regulator-fixed";
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_usb_otg1_vbus>;
> +		regulator-name = "usb_otg1_vbus";
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +		gpio = <&gpio4 0 GPIO_ACTIVE_HIGH>;
> +		enable-active-high;
> +	};
> +
> +	reg_usb_otg2_vbus: regulator-otg2-vbus {
> +		compatible = "regulator-fixed";
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_usb_otg2_vbus>;
> +		regulator-name = "usb_otg2_vbus";
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +		gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>;
> +		enable-active-high;
> +	};
> +
> +	reg_aud3v: regulator-aud3v {
> +		compatible = "regulator-fixed";
> +		regulator-name = "wm8962-supply-3v15";
> +		regulator-min-microvolt = <3150000>;
> +		regulator-max-microvolt = <3150000>;
> +		regulator-boot-on;
> +	};
> +
> +	reg_aud4v: regulator-aud4v {
> +		compatible = "regulator-fixed";
> +		regulator-name = "wm8962-supply-4v2";
> +		regulator-min-microvolt = <4325000>;
> +		regulator-max-microvolt = <4325000>;
> +		regulator-boot-on;
> +	};
> +
> +	reg_lcd: regulator-lcd {
> +		compatible = "regulator-fixed";
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_reg_lcd>;
> +		regulator-name = "lcd-pwr";
> +		gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>;
> +		enable-active-high;
> +	};
> +
> +	reg_sd1_vmmc: regulator-sd1-vmmc {
> +		compatible = "regulator-fixed";
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_reg_sd1_vmmc>;
> +		regulator-name = "SD1_SPWR";
> +		regulator-min-microvolt = <3000000>;
> +		regulator-max-microvolt = <3000000>;
> +		gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;
> +		enable-active-high;
> +	};
> +};
> +
> +&cpu0 {
> +	arm-supply = <&sw1a_reg>;
> +	soc-supply = <&sw1c_reg>;
> +};
> +
> +&i2c1 {
> +	clock-frequency = <100000>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_i2c1>;
> +	status = "okay";
> +
> +	pfuze100: pmic at 8 {
> +		compatible = "fsl,pfuze100";
> +		reg = <0x08>;
> +
> +		regulators {
> +			sw1a_reg: sw1ab {
> +				regulator-min-microvolt = <300000>;
> +				regulator-max-microvolt = <1875000>;
> +				regulator-boot-on;
> +				regulator-always-on;
> +				regulator-ramp-delay = <6250>;
> +			};
> +
> +			sw1c_reg: sw1c {
> +				regulator-min-microvolt = <300000>;
> +				regulator-max-microvolt = <1875000>;
> +				regulator-boot-on;
> +				regulator-always-on;
> +				regulator-ramp-delay = <6250>;
> +			};
> +
> +			sw2_reg: sw2 {
> +				regulator-min-microvolt = <800000>;
> +				regulator-max-microvolt = <3300000>;
> +				regulator-boot-on;
> +				regulator-always-on;
> +			};
> +
> +			sw3a_reg: sw3a {
> +				regulator-min-microvolt = <400000>;
> +				regulator-max-microvolt = <1975000>;
> +				regulator-boot-on;
> +				regulator-always-on;
> +			};
> +
> +			sw3b_reg: sw3b {
> +				regulator-min-microvolt = <400000>;
> +				regulator-max-microvolt = <1975000>;
> +				regulator-boot-on;
> +				regulator-always-on;
> +			};
> +
> +			sw4_reg: sw4 {
> +				regulator-min-microvolt = <800000>;
> +				regulator-max-microvolt = <3300000>;
> +			};
> +
> +			swbst_reg: swbst {
> +				regulator-min-microvolt = <5000000>;
> +				regulator-max-microvolt = <5150000>;
> +			};
> +
> +			snvs_reg: vsnvs {
> +				regulator-min-microvolt = <1000000>;
> +				regulator-max-microvolt = <3000000>;
> +				regulator-boot-on;
> +				regulator-always-on;
> +			};
> +
> +			vref_reg: vrefddr {
> +				regulator-boot-on;
> +				regulator-always-on;
> +			};
> +
> +			vgen1_reg: vgen1 {
> +				regulator-min-microvolt = <800000>;
> +				regulator-max-microvolt = <1550000>;
> +				regulator-always-on;
> +			};
> +
> +			vgen2_reg: vgen2 {
> +				regulator-min-microvolt = <800000>;
> +				regulator-max-microvolt = <1550000>;
> +			};
> +
> +			vgen3_reg: vgen3 {
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <3300000>;
> +			};
> +
> +			vgen4_reg: vgen4 {
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <3300000>;
> +				regulator-always-on;
> +			};
> +
> +			vgen5_reg: vgen5 {
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <3300000>;
> +				regulator-always-on;
> +			};
> +
> +			vgen6_reg: vgen6 {
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <3300000>;
> +				regulator-always-on;
> +			};
> +		};
> +	};
> +};
> +
> +&iomuxc {
> +	pinctrl_usb_otg1_vbus: vbus1grp {
> +		fsl,pins = <
> +			MX6SLL_PAD_KEY_COL4__GPIO4_IO00 0x17059
> +		>;
> +	};
> +
> +	pinctrl_usb_otg2_vbus: vbus2grp {
> +		fsl,pins = <
> +			MX6SLL_PAD_KEY_COL5__GPIO4_IO02 0x17059
> +		>;
> +	};
> +
> +	pinctrl_reg_lcd: reglcdgrp {
> +		fsl,pins = <
> +			MX6SLL_PAD_ECSPI1_SCLK__GPIO4_IO08 0x17059
> +		>;
> +	};
> +
> +	pinctrl_reg_sd1_vmmc: sd1vmmcgrp {
> +		fsl,pins = <
> +			MX6SLL_PAD_KEY_COL3__GPIO3_IO30 0x17059
> +		>;
> +	};
> +
> +	pinctrl_uart1: uart1grp {
> +		fsl,pins = <
> +			MX6SLL_PAD_UART1_TXD__UART1_DCE_TX 0x1b0b1
> +			MX6SLL_PAD_UART1_RXD__UART1_DCE_RX 0x1b0b1
> +		>;
> +	};
> +
> +	pinctrl_usdhc1: usdhc1grp {
> +		fsl,pins = <
> +			MX6SLL_PAD_SD1_CMD__SD1_CMD	0x17059
> +			MX6SLL_PAD_SD1_CLK__SD1_CLK	0x13059
> +			MX6SLL_PAD_SD1_DATA0__SD1_DATA0	0x17059
> +			MX6SLL_PAD_SD1_DATA1__SD1_DATA1	0x17059
> +			MX6SLL_PAD_SD1_DATA2__SD1_DATA2	0x17059
> +			MX6SLL_PAD_SD1_DATA3__SD1_DATA3	0x17059
> +		>;
> +	};
> +
> +	pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
> +		fsl,pins = <
> +			MX6SLL_PAD_SD1_CMD__SD1_CMD	0x170b9
> +			MX6SLL_PAD_SD1_CLK__SD1_CLK	0x130b9
> +			MX6SLL_PAD_SD1_DATA0__SD1_DATA0	0x170b9
> +			MX6SLL_PAD_SD1_DATA1__SD1_DATA1	0x170b9
> +			MX6SLL_PAD_SD1_DATA2__SD1_DATA2	0x170b9
> +			MX6SLL_PAD_SD1_DATA3__SD1_DATA3	0x170b9
> +		>;
> +	};
> +
> +	pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
> +		fsl,pins = <
> +			MX6SLL_PAD_SD1_CMD__SD1_CMD	0x170f9
> +			MX6SLL_PAD_SD1_CLK__SD1_CLK	0x130f9
> +			MX6SLL_PAD_SD1_DATA0__SD1_DATA0	0x170f9
> +			MX6SLL_PAD_SD1_DATA1__SD1_DATA1	0x170f9
> +			MX6SLL_PAD_SD1_DATA2__SD1_DATA2	0x170f9
> +			MX6SLL_PAD_SD1_DATA3__SD1_DATA3	0x170f9
> +		>;
> +	};
> +
> +	pinctrl_usbotg1: usbotg1grp {
> +		fsl,pins = <
> +			MX6SLL_PAD_EPDC_PWR_COM__USB_OTG1_ID 0x17059
> +		>;
> +	};
> +
> +	pinctrl_i2c1: i2c1grp {
> +		fsl,pins = <
> +			MX6SLL_PAD_I2C1_SCL__I2C1_SCL	 0x4001b8b1
> +			MX6SLL_PAD_I2C1_SDA__I2C1_SDA	 0x4001b8b1
> +		>;
> +	};

Please try to sort these pinctrl nodes alphabetically.

Shawn

> +};
> +
> +&uart1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_uart1>;
> +	status = "okay";
> +};
> +
> +&usdhc1 {
> +	pinctrl-names = "default", "state_100mhz", "state_200mhz";
> +	pinctrl-0 = <&pinctrl_usdhc1>;
> +	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
> +	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
> +	cd-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
> +	wp-gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
> +	keep-power-in-suspend;
> +	wakeup-source;
> +	vmmc-supply = <&reg_sd1_vmmc>;
> +	status = "okay";
> +};
> +
> +&usbotg1 {
> +	vbus-supply = <&reg_usb_otg1_vbus>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_usbotg1>;
> +	disable-over-current;
> +	srp-disable;
> +	hnp-disable;
> +	adp-disable;
> +	status = "okay";
> +};
> +
> +&usbotg2 {
> +	vbus-supply = <&reg_usb_otg2_vbus>;
> +	dr_mode = "host";
> +	disable-over-current;
> +	status = "okay";
> +};
> -- 
> 1.9.1
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [PACTCH v5 1/2] ARM: dts: imx: Add basic dtsi file for imx6sll
  2018-05-02  6:55 ` [PACTCH v5 1/2] ARM: dts: imx: Add basic dtsi file for imx6sll Shawn Guo
@ 2018-05-08  7:52   ` Jacky Bai
  0 siblings, 0 replies; 4+ messages in thread
From: Jacky Bai @ 2018-05-08  7:52 UTC (permalink / raw)
  To: linux-arm-kernel

> Subject: Re: [PACTCH v5 1/2] ARM: dts: imx: Add basic dtsi file for imx6sll
> 
> On Fri, Apr 13, 2018 at 04:01:03PM +0800, Bai Ping wrote:
> > Add dtsi file for imx6sll.
> >
> > Signed-off-by: Bai Ping <ping.bai@nxp.com>
> > Reviewed-by: Rob Herring <robh@kernel.org>
> > ---
> >  change v3->v4
> >  - update the license indentifier
> >  - remove leading zeros of node
> >  - move pin header to this patch
> >  change v4->v5
> >  - use generic name for device node
> > ---
> >  arch/arm/boot/dts/imx6sll-pinfunc.h | 880
> ++++++++++++++++++++++++++++++++++++
> >  arch/arm/boot/dts/imx6sll.dtsi      | 802
> ++++++++++++++++++++++++++++++++
> >  2 files changed, 1682 insertions(+)
> >  create mode 100644 arch/arm/boot/dts/imx6sll-pinfunc.h
> >  create mode 100644 arch/arm/boot/dts/imx6sll.dtsi
> 
> <snip>
> 
> > +
> > +			epit1: epit at 20d0000 {
> > +				reg = <0x020d0000 0x4000>;
> > +				interrupts = <GIC_SPI 56
> IRQ_TYPE_LEVEL_HIGH>;
> > +			};
> > +
> > +			epit2: epit at 20d4000 {
> > +				reg = <0x020d4000 0x4000>;
> > +				interrupts = <GIC_SPI 57
> IRQ_TYPE_LEVEL_HIGH>;
> > +			};
> 
> 'timer' for node name.  If these devices are not used, I would even suggest
> to drop them.
> 

ok, will drop these node.

> > +
> > +			src: reset-controller at 20d8000 {
> > +				compatible = "fsl,imx6sll-src";
> > +				reg = <0x020d8000 0x4000>;
> > +				interrupts = <GIC_SPI 91
> IRQ_TYPE_LEVEL_HIGH>,
> > +					     <GIC_SPI 96
> IRQ_TYPE_LEVEL_HIGH>;
> > +				#reset-cells = <1>;
> > +			};
> > +
> > +			gpc: interrupt-controller at 20dc000 {
> > +				compatible = "fsl,imx6sll-gpc", "fsl,imx6q-
> gpc";
> > +				reg = <0x020dc000 0x4000>;
> > +				interrupt-controller;
> > +				#interrupt-cells = <3>;
> > +				interrupts = <GIC_SPI 89
> IRQ_TYPE_LEVEL_HIGH>;
> > +				interrupt-parent = <&intc>;
> > +				fsl,mf-mix-wakeup-irq = <0x7c00000 0x7d00
> 0x0 0x1400640>;
> > +			};
> > +
> > +			iomuxc: pinctrl at 20e0000 {
> > +				compatible = "fsl,imx6sll-iomuxc";
> > +				reg = <0x020e0000 0x4000>;
> > +			};
> > +
> > +			gpr: iomuxc-gpr at 20e4000 {
> > +				compatible = "fsl,imx6sll-iomuxc-gpr",
> > +					     "fsl,imx6q-iomuxc-gpr", "syscon";
> > +				reg = <0x020e4000 0x4000>;
> > +			};
> > +
> > +			csi: csi at 20e8000 {
> > +				compatible = "fsl,imx6sll-csi", "fsl,imx6s-csi";
> > +				reg = <0x020e8000 0x4000>;
> > +				interrupts = <GIC_SPI 7
> IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clks IMX6SLL_CLK_DUMMY>,
> > +					 <&clks IMX6SLL_CLK_CSI>,
> > +					 <&clks IMX6SLL_CLK_DUMMY>;
> > +				clock-names = "disp-axi", "csi_mclk",
> "disp_dcic";
> > +				status = "disabled";
> > +			};
> > +
> > +			sdma: dma-controller at 20ec000 {
> > +				compatible = "fsl,imx6sll-sdma", "fsl,imx35-
> sdma";
> > +				reg = <0x020ec000 0x4000>;
> > +				interrupts = <GIC_SPI 2
> IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clks IMX6SLL_CLK_SDMA>,
> > +					 <&clks IMX6SLL_CLK_SDMA>;
> > +				clock-names = "ipg", "ahb";
> > +				#dma-cells = <3>;
> > +				iram = <&ocram>;
> > +				fsl,sdma-ram-script-name =
> "imx/sdma/sdma-imx6q.bin";
> > +			};
> > +
> > +			lcdif: lcd-controller at 20f8000 {
> > +				compatible = "fsl,imx6sll-lcdif", "fsl,imx28-
> lcdif";
> > +				reg = <0x020f8000 0x4000>;
> > +				interrupts = <GIC_SPI 39
> IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clks IMX6SLL_CLK_LCDIF_PIX>,
> > +					 <&clks IMX6SLL_CLK_LCDIF_APB>,
> > +					 <&clks IMX6SLL_CLK_DUMMY>;
> > +				clock-names = "pix", "axi", "disp_axi";
> > +				status = "disabled";
> > +			};
> > +
> > +			dcp: dcp at 20fc000 {
> > +				compatible = "fsl,imx6sl-dcp";
> 
> Is the compatible supported/documented?

It is compatible with imx28, I will change this compatible to " fsl,imx28-dcp "
> 
> > +				reg = <0x020fc000 0x4000>;
> > +				interrupts = <GIC_SPI 99
> IRQ_TYPE_LEVEL_HIGH>,
> > +					     <GIC_SPI 100
> IRQ_TYPE_LEVEL_HIGH>,
> > +					     <GIC_SPI 101
> IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clks IMX6SLL_CLK_DCP>;
> > +				clock-names = "dcp";
> > +			};
> > +		};
> > +
> > +		aips2: aips-bus at 2100000 {
> > +			compatible = "fsl,aips-bus", "simple-bus";
> > +			#address-cells = <1>;
> > +			#size-cells = <1>;
> > +			reg = <0x02100000 0x100000>;
> > +			ranges;
> > +
> > +			usbotg1: usb at 2184000 {
> > +				compatible = "fsl,imx6sll-usb", "fsl,imx6ul-
> usb",
> > +						"fsl,imx27-usb";
> > +				reg = <0x02184000 0x200>;
> > +				interrupts = <GIC_SPI 43
> IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clks IMX6SLL_CLK_USBOH3>;
> > +				fsl,usbphy = <&usbphy1>;
> > +				fsl,usbmisc = <&usbmisc 0>;
> > +				fsl,anatop = <&anatop>;
> > +				ahb-burst-config = <0x0>;
> > +				tx-burst-size-dword = <0x10>;
> > +				rx-burst-size-dword = <0x10>;
> > +				status = "disabled";
> > +			};
> > +
> > +			usbotg2: usb at 2184200 {
> > +				compatible = "fsl,imx6sll-usb", "fsl,imx6ul-
> usb",
> > +						"fsl,imx27-usb";
> > +				reg = <0x02184200 0x200>;
> > +				interrupts = <GIC_SPI 42
> IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clks IMX6SLL_CLK_USBOH3>;
> > +				fsl,usbphy = <&usbphy2>;
> > +				fsl,usbmisc = <&usbmisc 1>;
> > +				ahb-burst-config = <0x0>;
> > +				tx-burst-size-dword = <0x10>;
> > +				rx-burst-size-dword = <0x10>;
> > +				status = "disabled";
> > +			};
> > +
> > +			usbmisc: usbmisc at 2184800 {
> > +				#index-cells = <1>;
> > +				compatible = "fsl,imx6sll-usbmisc",
> "fsl,imx6ul-usbmisc",
> > +						"fsl,imx6q-usbmisc";
> > +				reg = <0x02184800 0x200>;
> > +			};
> > +
> > +			usdhc1: mmc at 2190000 {
> > +				compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-
> usdhc";
> > +				reg = <0x02190000 0x4000>;
> > +				interrupts = <GIC_SPI 22
> IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clks IMX6SLL_CLK_USDHC1>,
> > +					 <&clks IMX6SLL_CLK_USDHC1>,
> > +					 <&clks IMX6SLL_CLK_USDHC1>;
> > +				clock-names = "ipg", "ahb", "per";
> > +				bus-width = <4>;
> > +				fsl,tuning-step = <2>;
> > +				fsl,tuning-start-tap = <20>;
> > +				status = "disabled";
> > +			};
> > +
> > +			usdhc2: mmc at 2194000 {
> > +				compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-
> usdhc";
> > +				reg = <0x02194000 0x4000>;
> > +				interrupts = <GIC_SPI 23
> IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clks IMX6SLL_CLK_USDHC2>,
> > +					 <&clks IMX6SLL_CLK_USDHC2>,
> > +					 <&clks IMX6SLL_CLK_USDHC2>;
> > +				clock-names = "ipg", "ahb", "per";
> > +				bus-width = <4>;
> > +				fsl,tuning-step = <2>;
> > +				fsl,tuning-start-tap = <20>;
> > +				status = "disabled";
> > +			};
> > +
> > +			usdhc3: mmc at 2198000 {
> > +				compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-
> usdhc";
> > +				reg = <0x02198000 0x4000>;
> > +				interrupts = <GIC_SPI 24
> IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clks IMX6SLL_CLK_USDHC3>,
> > +					 <&clks IMX6SLL_CLK_USDHC3>,
> > +					 <&clks IMX6SLL_CLK_USDHC3>;
> > +				clock-names = "ipg", "ahb", "per";
> > +				bus-width = <4>;
> > +				fsl,tuning-step = <2>;
> > +				fsl,tuning-start-tap = <20>;
> > +				status = "disabled";
> > +			};
> > +
> > +			i2c1: i2c at 21a0000 {
> > +				#address-cells = <1>;
> > +				#size-cells = <0>;
> > +				compatible = "fs,imx6sll-i2c", "fsl,imx21-i2c";
> > +				reg = <0x021a0000 0x4000>;
> > +				interrupts = <GIC_SPI 36
> IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clks IMX6SLL_CLK_I2C1>;
> > +				status = "disabled";
> > +			};
> > +
> > +			i2c2: i2c at 21a4000 {
> > +				#address-cells = <1>;
> > +				#size-cells = <0>;
> > +				compatible = "fsl,imx6sll-i2c", "fsl,imx21-i2c";
> > +				reg = <0x021a4000 0x4000>;
> > +				interrupts = <GIC_SPI 37
> IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clks IMX6SLL_CLK_I2C2>;
> > +				status = "disabled";
> > +			};
> > +
> > +			i2c3: i2c at 21a8000 {
> > +				#address-cells = <1>;
> > +				#size-cells = <0>;
> > +				compatible = "fsl,imx6sll-i2c", "fsl,imx21-i2c";
> > +				reg = <0x021a8000 0x4000>;
> > +				interrupts = <GIC_SPI 38
> IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clks IMX6SLL_CLK_I2C3>;
> > +				status = "disabled";
> > +			};
> > +
> > +			romcp at 21ac000 {
> > +				compatible = "fsl,imx6sll-romcp", "syscon";
> 
> The compatible "fsl,imx6sll-romcp" is undocumented.  If the device is not
> used by upstream kernel, I would even suggest to drop it.

Ok, will drop it. 

> 
> > +				reg = <0x021ac000 0x4000>;
> > +			};
> > +
> > +			mmdc: memory-controller at 21b0000 {
> > +				compatible = "fsl,imx6sll-mmdc", "fsl,imx6q-
> mmdc";
> > +				reg = <0x021b0000 0x4000>;
> > +			};
> > +
> > +			rngb: rngb at 21b4000 {
> 
> Is the device used at all?

will drop it.

> 
> > +				reg = <0x021b4000 0x4000>;
> > +				interrupts = <GIC_SPI 5
> IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks =  <&clks IMX6SLL_CLK_DUMMY>;
> > +			};
> > +
> > +			ocotp: ocotp-ctrl at 21bc000 {
> > +				compatible = "fsl,imx6sll-ocotp", "syscon";
> > +				reg = <0x021bc000 0x4000>;
> > +				clocks = <&clks IMX6SLL_CLK_OCOTP>;
> > +			};
> > +
> > +			snvs_gpr: snvs-gpr at 21c4000 {
> > +				reg = <0x021c4000 0x10000>;
> > +			};
> 
> Ditto
> 
> > +
> > +			iomuxc_snvs: iomuxc-snvs at 21c8000 {
> > +				reg = <0x021c8000 0x10000>;
> > +			};
> 
> Ditto
> 

Ok. Will drop these two.

> Shawn
> 
> > +
> > +			audmux: audmux at 21d8000 {
> > +				compatible = "fsl,imx6sll-audmux",
> "fsl,imx31-audmux";
> > +				reg = <0x021d8000 0x4000>;
> > +				status = "disabled";
> > +			};
> > +
> > +			uart5: serial at 21f4000 {
> > +				compatible = "fsl,imx6sll-uart", "fsl,imx6q-
> uart",
> > +					     "fsl,imx21-uart";
> > +				reg = <0x021f4000 0x4000>;
> > +				interrupts =<GIC_SPI 30
> IRQ_TYPE_LEVEL_HIGH>;
> > +				dmas = <&sdma 33 4 0>, <&sdma 34 4 0>;
> > +				dma-names = "rx", "tx";
> > +				clocks = <&clks IMX6SLL_CLK_UART5_IPG>,
> > +					 <&clks
> IMX6SLL_CLK_UART5_SERIAL>;
> > +				clock-names = "ipg", "per";
> > +				status = "disabled";
> > +			};
> > +		};
> > +	};
> > +};
> > --
> > 1.9.1
> >

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2018-05-08  7:52 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
     [not found] <1523606464-21561-1-git-send-email-ping.bai@nxp.com>
2018-04-13  8:01 ` [PACTCH v5 2/2] ARM: dts: imx: Add basic dts support for imx6sll EVK board Bai Ping
2018-05-02  6:58   ` Shawn Guo
2018-05-02  6:55 ` [PACTCH v5 1/2] ARM: dts: imx: Add basic dtsi file for imx6sll Shawn Guo
2018-05-08  7:52   ` Jacky Bai

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).