* [PATCH v2 0/2] Add macro defines for AM335x
@ 2018-05-05 8:59 Christina Quast
2018-05-05 8:59 ` [PATCH v2 1/2] ARM: dts: am335x: Replace numeric pinmux address with macro defines Christina Quast
[not found] ` <20180505085921.5513-3-cquast@baylibre.com>
0 siblings, 2 replies; 4+ messages in thread
From: Christina Quast @ 2018-05-05 8:59 UTC (permalink / raw)
To: linux-arm-kernel
This patchset replaces the register offsets for am335x with macro defines.
The values are extraced from the "AM335x SitaraTM Processors Technical
Reference Manual".
The TRM lists AM3351, AM3352, AM3354, AM3356, AM3357, AM3358 and AM3359 on page 173.
So I would assume the registers are the same for all of those.
Furthermore, one register was eliminated in revision M in the datasheet,
but I added it to to the table of defines.
Christina Quast (2):
ARM: dts: am335x: Replace numeric pinmux address with macro defines
ARM: dts: am335x: Replaced register offsets with defines
arch/arm/boot/dts/am335x-baltos-ir2110.dts | 17 +-
arch/arm/boot/dts/am335x-baltos-ir3220.dts | 39 +--
arch/arm/boot/dts/am335x-baltos-ir5221.dts | 43 +--
arch/arm/boot/dts/am335x-baltos-leds.dtsi | 7 +-
arch/arm/boot/dts/am335x-baltos.dtsi | 141 ++++-----
arch/arm/boot/dts/am335x-base0033.dts | 49 +--
arch/arm/boot/dts/am335x-bone-common.dtsi | 105 +++----
.../arm/boot/dts/am335x-boneblack-common.dtsi | 55 ++--
.../boot/dts/am335x-boneblack-wireless.dts | 29 +-
arch/arm/boot/dts/am335x-boneblue.dts | 105 +++----
.../arm/boot/dts/am335x-bonegreen-common.dtsi | 5 +-
.../boot/dts/am335x-bonegreen-wireless.dts | 29 +-
arch/arm/boot/dts/am335x-chiliboard.dts | 67 ++---
arch/arm/boot/dts/am335x-chilisom.dtsi | 35 +--
arch/arm/boot/dts/am335x-cm-t335.dts | 155 +++++-----
arch/arm/boot/dts/am335x-evm.dts | 221 +++++++-------
arch/arm/boot/dts/am335x-evmsk.dts | 279 +++++++++---------
arch/arm/boot/dts/am335x-icev2.dts | 117 ++++----
arch/arm/boot/dts/am335x-igep0033.dtsi | 41 +--
arch/arm/boot/dts/am335x-lxm.dts | 121 ++++----
.../arm/boot/dts/am335x-moxa-uc-8100-me-t.dts | 117 ++++----
arch/arm/boot/dts/am335x-nano.dts | 141 ++++-----
arch/arm/boot/dts/am335x-pcm-953.dtsi | 75 ++---
arch/arm/boot/dts/am335x-pdu001.dts | 171 +++++------
arch/arm/boot/dts/am335x-pepper.dts | 201 ++++++-------
arch/arm/boot/dts/am335x-phycore-som.dtsi | 61 ++--
arch/arm/boot/dts/am335x-sbc-t335.dts | 113 +++----
arch/arm/boot/dts/am335x-shc.dts | 225 +++++++-------
arch/arm/boot/dts/am335x-sl50.dts | 153 +++++-----
arch/arm/boot/dts/am335x-wega.dtsi | 69 ++---
include/dt-bindings/pinctrl/am335x.h | 147 +++++++++
31 files changed, 1655 insertions(+), 1478 deletions(-)
create mode 100644 include/dt-bindings/pinctrl/am335x.h
--
2.17.0
^ permalink raw reply [flat|nested] 4+ messages in thread* [PATCH v2 1/2] ARM: dts: am335x: Replace numeric pinmux address with macro defines
2018-05-05 8:59 [PATCH v2 0/2] Add macro defines for AM335x Christina Quast
@ 2018-05-05 8:59 ` Christina Quast
2018-05-07 17:05 ` Rob Herring
[not found] ` <20180505085921.5513-3-cquast@baylibre.com>
1 sibling, 1 reply; 4+ messages in thread
From: Christina Quast @ 2018-05-05 8:59 UTC (permalink / raw)
To: linux-arm-kernel
The values are extraced from the "AM335x SitaraTM Processors Technical
Reference Manual", Section 9.3.1 CONTROL_MODULE Registers, based on the
file autogenerated by TI PinMux.
The register conf_rtc_kaldo_enn was removed from the Control Module
Registers table with Revision M.
Signed-off-by: Christina Quast <cquast@baylibre.com>
Signed-off-by: Oleg Kokorin <ole2mail@mail.com>
---
include/dt-bindings/pinctrl/am335x.h | 147 +++++++++++++++++++++++++++
1 file changed, 147 insertions(+)
create mode 100644 include/dt-bindings/pinctrl/am335x.h
diff --git a/include/dt-bindings/pinctrl/am335x.h b/include/dt-bindings/pinctrl/am335x.h
new file mode 100644
index 000000000000..953cec85afce
--- /dev/null
+++ b/include/dt-bindings/pinctrl/am335x.h
@@ -0,0 +1,147 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * This header provides constants specific to AM335X pinctrl bindings.
+ *
+ * Copyright (C) 2018 Texas Instruments Incorporated
+ */
+
+#ifndef AM335X_PIN_MUX_H_
+#define AM335X_PIN_MUX_H_
+
+#define PIN_MODE(mode) (mode)
+#define PIN_PULL_UD_EN (0x1U << 3U)
+#define PIN_PULL_TYPE_SEL (0x1U << 4U)
+#define PIN_RX_ACTIVE (0x1U << 5U)
+#define PIN_SLEW_SLOW (0x1U << 6U)
+
+#define AM335X_PIN_OFFSET_MIN 0x0800
+
+#define AM335X_PIN_GPMC_AD0 0x800
+#define AM335X_PIN_GPMC_AD1 0x804
+#define AM335X_PIN_GPMC_AD2 0x808
+#define AM335X_PIN_GPMC_AD3 0x80c
+#define AM335X_PIN_GPMC_AD4 0x810
+#define AM335X_PIN_GPMC_AD5 0x814
+#define AM335X_PIN_GPMC_AD6 0x818
+#define AM335X_PIN_GPMC_AD7 0x81c
+#define AM335X_PIN_GPMC_AD8 0x820
+#define AM335X_PIN_GPMC_AD9 0x824
+#define AM335X_PIN_GPMC_AD10 0x828
+#define AM335X_PIN_GPMC_AD11 0x82c
+#define AM335X_PIN_GPMC_AD12 0x830
+#define AM335X_PIN_GPMC_AD13 0x834
+#define AM335X_PIN_GPMC_AD14 0x838
+#define AM335X_PIN_GPMC_AD15 0x83c
+#define AM335X_PIN_GPMC_A0 0x840
+#define AM335X_PIN_GPMC_A1 0x844
+#define AM335X_PIN_GPMC_A2 0x848
+#define AM335X_PIN_GPMC_A3 0x84c
+#define AM335X_PIN_GPMC_A4 0x850
+#define AM335X_PIN_GPMC_A5 0x854
+#define AM335X_PIN_GPMC_A6 0x858
+#define AM335X_PIN_GPMC_A7 0x85c
+#define AM335X_PIN_GPMC_A8 0x860
+#define AM335X_PIN_GPMC_A9 0x864
+#define AM335X_PIN_GPMC_A10 0x868
+#define AM335X_PIN_GPMC_A11 0x86c
+#define AM335X_PIN_GPMC_WAIT0 0x870
+#define AM335X_PIN_GPMC_WPN 0x874
+#define AM335X_PIN_GPMC_BEN1 0x878
+#define AM335X_PIN_GPMC_CSN0 0x87c
+#define AM335X_PIN_GPMC_CSN1 0x880
+#define AM335X_PIN_GPMC_CSN2 0x884
+#define AM335X_PIN_GPMC_CSN3 0x888
+#define AM335X_PIN_GPMC_CLK 0x88c
+#define AM335X_PIN_GPMC_ADVN_ALE 0x890
+#define AM335X_PIN_GPMC_OEN_REN 0x894
+#define AM335X_PIN_GPMC_WEN 0x898
+#define AM335X_PIN_GPMC_BEN0_CLE 0x89c
+#define AM335X_PIN_LCD_DATA0 0x8a0
+#define AM335X_PIN_LCD_DATA1 0x8a4
+#define AM335X_PIN_LCD_DATA2 0x8a8
+#define AM335X_PIN_LCD_DATA3 0x8ac
+#define AM335X_PIN_LCD_DATA4 0x8b0
+#define AM335X_PIN_LCD_DATA5 0x8b4
+#define AM335X_PIN_LCD_DATA6 0x8b8
+#define AM335X_PIN_LCD_DATA7 0x8bc
+#define AM335X_PIN_LCD_DATA8 0x8c0
+#define AM335X_PIN_LCD_DATA9 0x8c4
+#define AM335X_PIN_LCD_DATA10 0x8c8
+#define AM335X_PIN_LCD_DATA11 0x8cc
+#define AM335X_PIN_LCD_DATA12 0x8d0
+#define AM335X_PIN_LCD_DATA13 0x8d4
+#define AM335X_PIN_LCD_DATA14 0x8d8
+#define AM335X_PIN_LCD_DATA15 0x8dc
+#define AM335X_PIN_LCD_VSYNC 0x8e0
+#define AM335X_PIN_LCD_HSYNC 0x8e4
+#define AM335X_PIN_LCD_PCLK 0x8e8
+#define AM335X_PIN_LCD_AC_BIAS_EN 0x8ec
+#define AM335X_PIN_MMC0_DAT3 0x8f0
+#define AM335X_PIN_MMC0_DAT2 0x8f4
+#define AM335X_PIN_MMC0_DAT1 0x8f8
+#define AM335X_PIN_MMC0_DAT0 0x8fc
+#define AM335X_PIN_MMC0_CLK 0x900
+#define AM335X_PIN_MMC0_CMD 0x904
+#define AM335X_PIN_MII1_COL 0x908
+#define AM335X_PIN_MII1_CRS 0x90c
+#define AM335X_PIN_MII1_RX_ER 0x910
+#define AM335X_PIN_MII1_TX_EN 0x914
+#define AM335X_PIN_MII1_RX_DV 0x918
+#define AM335X_PIN_MII1_TXD3 0x91c
+#define AM335X_PIN_MII1_TXD2 0x920
+#define AM335X_PIN_MII1_TXD1 0x924
+#define AM335X_PIN_MII1_TXD0 0x928
+#define AM335X_PIN_MII1_TX_CLK 0x92c
+#define AM335X_PIN_MII1_RX_CLK 0x930
+#define AM335X_PIN_MII1_RXD3 0x934
+#define AM335X_PIN_MII1_RXD2 0x938
+#define AM335X_PIN_MII1_RXD1 0x93c
+#define AM335X_PIN_MII1_RXD0 0x940
+#define AM335X_PIN_RMII1_REF_CLK 0x944
+#define AM335X_PIN_MDIO 0x948
+#define AM335X_PIN_MDC 0x94c
+#define AM335X_PIN_SPI0_SCLK 0x950
+#define AM335X_PIN_SPI0_D0 0x954
+#define AM335X_PIN_SPI0_D1 0x958
+#define AM335X_PIN_SPI0_CS0 0x95c
+#define AM335X_PIN_SPI0_CS1 0x960
+#define AM335X_PIN_ECAP0_IN_PWM0_OUT 0x964
+#define AM335X_PIN_UART0_CTSN 0x968
+#define AM335X_PIN_UART0_RTSN 0x96c
+#define AM335X_PIN_UART0_RXD 0x970
+#define AM335X_PIN_UART0_TXD 0x974
+#define AM335X_PIN_UART1_CTSN 0x978
+#define AM335X_PIN_UART1_RTSN 0x97c
+#define AM335X_PIN_UART1_RXD 0x980
+#define AM335X_PIN_UART1_TXD 0x984
+#define AM335X_PIN_I2C0_SDA 0x988
+#define AM335X_PIN_I2C0_SCL 0x98c
+#define AM335X_PIN_MCASP0_ACLKX 0x990
+#define AM335X_PIN_MCASP0_FSX 0x994
+#define AM335X_PIN_MCASP0_AXR0 0x998
+#define AM335X_PIN_MCASP0_AHCLKR 0x99c
+#define AM335X_PIN_MCASP0_ACLKR 0x9a0
+#define AM335X_PIN_MCASP0_FSR 0x9a4
+#define AM335X_PIN_MCASP0_AXR1 0x9a8
+#define AM335X_PIN_MCASP0_AHCLKX 0x9ac
+#define AM335X_PIN_XDMA_EVENT_INTR0 0x9b0
+#define AM335X_PIN_XDMA_EVENT_INTR1 0x9b4
+#define AM335X_PIN_WARMRSTN 0x9b8
+#define AM335X_PIN_NNMI 0x9c0
+#define AM335X_PIN_TMS 0x9d0
+#define AM335X_PIN_TDI 0x9d4
+#define AM335X_PIN_TDO 0x9d8
+#define AM335X_PIN_TCK 0x9dc
+#define AM335X_PIN_TRSTN 0x9e0
+#define AM335X_PIN_EMU0 0x9e4
+#define AM335X_PIN_EMU1 0x9e8
+#define AM335X_PIN_RTC_PWRONRSTN 0x9f8
+#define AM335X_PIN_PMIC_POWER_EN 0x9fc
+#define AM335X_PIN_EXT_WAKEUP 0xa00
+#define AM335X_PIN_RTC_KALDO_ENN 0xa04
+#define AM335X_PIN_USB0_DRVVBUS 0xa1c
+#define AM335X_PIN_USB1_DRVVBUS 0xa34
+
+#define AM335X_PIN_OFFSET_MAX 0xa34
+
+#endif /* AM335X_PIN_MUX_H_ */
--
2.17.0
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH v2 1/2] ARM: dts: am335x: Replace numeric pinmux address with macro defines
2018-05-05 8:59 ` [PATCH v2 1/2] ARM: dts: am335x: Replace numeric pinmux address with macro defines Christina Quast
@ 2018-05-07 17:05 ` Rob Herring
0 siblings, 0 replies; 4+ messages in thread
From: Rob Herring @ 2018-05-07 17:05 UTC (permalink / raw)
To: linux-arm-kernel
On Sat, May 05, 2018 at 10:59:20AM +0200, Christina Quast wrote:
> The values are extraced from the "AM335x SitaraTM Processors Technical
> Reference Manual", Section 9.3.1 CONTROL_MODULE Registers, based on the
> file autogenerated by TI PinMux.
>
> The register conf_rtc_kaldo_enn was removed from the Control Module
> Registers table with Revision M.
>
> Signed-off-by: Christina Quast <cquast@baylibre.com>
> Signed-off-by: Oleg Kokorin <ole2mail@mail.com>
> ---
> include/dt-bindings/pinctrl/am335x.h | 147 +++++++++++++++++++++++++++
> 1 file changed, 147 insertions(+)
> create mode 100644 include/dt-bindings/pinctrl/am335x.h
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 4+ messages in thread
[parent not found: <20180505085921.5513-3-cquast@baylibre.com>]
* [PATCH v2 2/2] ARM: dts: am335x: Replaced register offsets with defines
[not found] ` <20180505085921.5513-3-cquast@baylibre.com>
@ 2018-05-07 21:02 ` Tony Lindgren
0 siblings, 0 replies; 4+ messages in thread
From: Tony Lindgren @ 2018-05-07 21:02 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
Thanks for updating these, adding Linus Walleij to Cc too.
* Christina Quast <cquast@baylibre.com> [180505 09:02]:
> The defines are taken from dt-bindings/pinctrl/am335x.h
If we're going to replace all of these, I'd go a step further
where we make pinctrl-single use the newish #pinctrl-cells but
set it to 2 instead of 1. Then set the pull flags as one value
using the generic pinctrl defines and the second value being
the selected mux mode.
Then the offset really should be from the padconf mux area,
not from the control module base. And then we would just have
a new macro for these being:
AM33XX_PINCTRL(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE0)
Where the PIN_INPUT ideally would be a Linux generic define.
Otherwise we'd be churning these same files over and
over.
Regards,
Tony
^ permalink raw reply [flat|nested] 4+ messages in thread
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2018-05-05 8:59 [PATCH v2 0/2] Add macro defines for AM335x Christina Quast
2018-05-05 8:59 ` [PATCH v2 1/2] ARM: dts: am335x: Replace numeric pinmux address with macro defines Christina Quast
2018-05-07 17:05 ` Rob Herring
[not found] ` <20180505085921.5513-3-cquast@baylibre.com>
2018-05-07 21:02 ` [PATCH v2 2/2] ARM: dts: am335x: Replaced register offsets with defines Tony Lindgren
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