From mboxrd@z Thu Jan 1 00:00:00 1970 From: jagan@amarulasolutions.com (Jagan Teki) Date: Fri, 18 May 2018 15:15:27 +0530 Subject: [PATCH v2 17/26] arm64: dts: allwinner: a64: Add HDMI support In-Reply-To: <20180518094536.17201-1-jagan@amarulasolutions.com> References: <20180518094536.17201-1-jagan@amarulasolutions.com> Message-ID: <20180518094536.17201-18-jagan@amarulasolutions.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org HDMI on Allwinner A64 has similar behaviour like H3/H5/A83T, so reuse the same dts node details for A64 with A83T compatible as fallback. HDMI PHY on Allwinner A64 has two clock parents so add them as pll-0 and pll-1 in CCU clock phadles. Signed-off-by: Jagan Teki --- Changes for v2: - Change compatibles and other based on previous patch changes arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index 9c1452ee8027..4ffd4787acd2 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -705,6 +705,33 @@ #interrupt-cells = <3>; }; + hdmi: hdmi at 1ee0000 { + compatible = "allwinner,sun50i-a64-dw-hdmi", + "allwinner,sun8i-a83t-dw-hdmi"; + reg = <0x01ee0000 0x10000>; + reg-io-width = <1>; + interrupts = ; + clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>, + <&ccu CLK_HDMI>; + clock-names = "iahb", "isfr", "tmds"; + resets = <&ccu RST_BUS_HDMI1>; + reset-names = "ctrl"; + phys = <&hdmi_phy>; + phy-names = "hdmi-phy"; + status = "disabled"; + }; + + hdmi_phy: hdmi-phy at 1ef0000 { + compatible = "allwinner,sun50i-a64-hdmi-phy"; + reg = <0x01ef0000 0x10000>; + clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>, + <&ccu CLK_PLL_VIDEO0>, <&ccu CLK_PLL_VIDEO1>; + clock-names = "bus", "mod", "pll-0", "pll-1"; + resets = <&ccu RST_BUS_HDMI0>; + reset-names = "phy"; + #phy-cells = <0>; + }; + rtc: rtc at 1f00000 { compatible = "allwinner,sun6i-a31-rtc"; reg = <0x01f00000 0x54>; -- 2.14.3