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From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 15/17] arm64: Add test_and_clear_flag and set_flag atomic assembler primitives
Date: Tue, 29 May 2018 13:11:19 +0100	[thread overview]
Message-ID: <20180529121121.24927-16-marc.zyngier@arm.com> (raw)
In-Reply-To: <20180529121121.24927-1-marc.zyngier@arm.com>

As we're about to need to atomically manipulate some thread
flags from entry.S, let's introduce two atomic primitives
(test_and_clear_flag and set_flag) for that purpose.

We provide two implementations: one using the traditional
LL/SC instructions, and one using the ARMv8.1 atomics.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
 arch/arm64/include/asm/assembler.h | 37 +++++++++++++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
index 0bcc98dbba56..d3612ad8035e 100644
--- a/arch/arm64/include/asm/assembler.h
+++ b/arch/arm64/include/asm/assembler.h
@@ -26,6 +26,7 @@
 #include <asm/asm-offsets.h>
 #include <asm/cpufeature.h>
 #include <asm/debug-monitors.h>
+#include <asm/lse.h>
 #include <asm/page.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/ptrace.h>
@@ -701,4 +702,40 @@ USER(\label, ic	ivau, \tmp2)			// invalidate I line PoU
 .Lyield_out_\@ :
 	.endm
 
+/*
+ * test_and_clear_flag:
+ *
+ * res: register containing the result (0 or 1 << bitnum)
+ * addr: address of the word to be manipulated
+ * bitnum: number of the bit in that word
+ * wtmp: temporary register, must be a 32bit reg
+ */
+	.macro test_and_clear_flag, res, addr, bitnum, wtmp
+alt_lse "  prfm	 pstl1strm, [\addr]",		"nop"
+alt_lse "8:ldxr  \res, [\addr]",		"ldr	 \res, [\addr]"
+	   tbz	 \res, #\bitnum, 9f
+alt_lse "  bic	 \res, \res, #(1 << \bitnum)",	"mov	 \res, #(1 << \bitnum)"
+alt_lse "  stlxr \wtmp, \res, [\addr]",		"ldclral \res, \res, [\addr]"
+alt_lse "  cbnz	 \wtmp, 8b",			"nop"
+alt_lse "  dmb   ish",				"nop"
+alt_lse "  orr	 \res, \res, #(1 << \bitnum)",	"nop"
+9:
+	.endm
+
+/*
+ * set_flag:
+ *
+ * addr: address of the word to be manipulated
+ * bitnum: number of the bit in that word
+ * tmp: temporary register
+ * wtmp: temporary register, must be a 32bit reg
+ */
+	.macro set_flag, addr, bitnum, tmp, wtmp
+alt_lse "  prfm	pstl1strm, [\addr]",		"mov   \tmp, #(1 << \bitnum)"
+alt_lse "8:ldxr \tmp, [\addr]", 		"stset \tmp, [\addr]"
+alt_lse "  orr	\tmp, \tmp, #(1 << \bitnum)",	"nop"
+alt_lse "  stxr \wtmp, \tmp, [\addr]",		"nop"
+alt_lse "  cbnz	\wtmp, 8b",			"nop"
+	.endm
+
 #endif	/* __ASM_ASSEMBLER_H */
-- 
2.14.2

  parent reply	other threads:[~2018-05-29 12:11 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-29 12:11 [PATCH v2 00/17] arm64 SSBD (aka Spectre-v4) mitigation Marc Zyngier
2018-05-29 12:11 ` [PATCH v2 01/17] arm/arm64: smccc: Add SMCCC-specific return codes Marc Zyngier
2018-05-29 12:11 ` [PATCH v2 02/17] arm64: Call ARCH_WORKAROUND_2 on transitions between EL0 and EL1 Marc Zyngier
2018-05-29 12:11 ` [PATCH v2 03/17] arm64: Add per-cpu infrastructure to call ARCH_WORKAROUND_2 Marc Zyngier
2018-05-29 12:11 ` [PATCH v2 04/17] arm64: Add ARCH_WORKAROUND_2 probing Marc Zyngier
2018-05-29 13:39   ` Suzuki K Poulose
2018-05-29 12:11 ` [PATCH v2 05/17] arm64: Add 'ssbd' command-line option Marc Zyngier
2018-06-09 12:53   ` Jon Masters
2018-06-09 13:19     ` Marc Zyngier
2018-05-29 12:11 ` [PATCH v2 06/17] arm64: ssbd: Add global mitigation state accessor Marc Zyngier
2018-05-29 12:11 ` [PATCH v2 07/17] arm64: ssbd: Skip apply_ssbd if not using dynamic mitigation Marc Zyngier
2018-06-09 13:03   ` Jon Masters
2018-06-09 13:21     ` Marc Zyngier
2018-05-29 12:11 ` [PATCH v2 08/17] arm64: ssbd: Restore mitigation status on CPU resume Marc Zyngier
2018-05-29 13:35   ` Mark Rutland
2018-05-29 12:11 ` [PATCH v2 09/17] arm64: ssbd: Introduce thread flag to control userspace mitigation Marc Zyngier
2018-05-29 12:11 ` [PATCH v2 10/17] arm64: ssbd: Add prctl interface for per-thread mitigation Marc Zyngier
2018-05-29 12:11 ` [PATCH v2 11/17] arm64: KVM: Add HYP per-cpu accessors Marc Zyngier
2018-05-29 12:11 ` [PATCH v2 12/17] arm64: KVM: Add ARCH_WORKAROUND_2 support for guests Marc Zyngier
2018-06-09 13:09   ` Jon Masters
2018-06-09 13:21     ` Marc Zyngier
2018-05-29 12:11 ` [PATCH v2 13/17] arm64: KVM: Handle guest's ARCH_WORKAROUND_2 requests Marc Zyngier
2018-05-29 12:11 ` [PATCH v2 14/17] arm64: KVM: Add ARCH_WORKAROUND_2 discovery through ARCH_FEATURES_FUNC_ID Marc Zyngier
2018-05-29 12:11 ` Marc Zyngier [this message]
2018-05-29 12:11 ` [PATCH v2 16/17] arm64: ssbd: Enable delayed setting of TIF_SSBD Marc Zyngier
2018-05-29 12:11 ` [PATCH v2 17/17] arm64: ssbd: Implement arch_seccomp_spec_mitigate Marc Zyngier
2018-05-30 15:58 ` [PATCH v2 00/17] arm64 SSBD (aka Spectre-v4) mitigation Will Deacon
2018-05-31 16:41 ` Catalin Marinas
2018-05-31 16:55   ` Marc Zyngier
2018-06-09 13:16 ` Jon Masters

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