From: nm@ti.com (Nishanth Menon)
To: linux-arm-kernel@lists.infradead.org
Subject: [U-Boot] [RFC PATCH 0/2] ARM: v7: Enable basic framework for supporting bits for CVE-2017-5715
Date: Tue, 12 Jun 2018 16:58:34 -0500 [thread overview]
Message-ID: <20180612215834.wrnfrb57ed3uxexa@kahuna> (raw)
In-Reply-To: <20180612214049.GA17671@n2100.armlinux.org.uk>
On 21:40-20180612, Russell King - ARM Linux wrote:
[...]
> > I started respinning the series, while there is definitely a use of
> > implementing in u-boot,
> > I am starting to wonder if we should also be doing this in kernel.
>
> How does the kernel set the bit when the kernel is running in non-secure
> mode, when the ACTLR is read-only in that mode?
For OMAP5/DRA7 SMP systems, I just posted a patch that seems to resolve
it:
https://patchwork.kernel.org/patch/10461273/
This'd be similar in implementation to ARM erratum 801819 workaround
that needs two pieces (u-boot + kernel). I am not really worried about
OMAP5/DRA7 since they should'nt loose context in Low power modes.
Other SoCs need to be aware of the constraints.
/me wishes PSCI was a standard during ARMv7, but it was'nt... So
legacy v7 SoCs have implementations that are kind of different (even
smc calling conventions vary).
--
Regards,
Nishanth Menon
next prev parent reply other threads:[~2018-06-12 21:58 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20180125214559.27570-1-nm@ti.com>
[not found] ` <CAOMZO5CcEf=EhFWknKmCXXLJPOgx=65jLH+X1OAGkg5VxBGVew@mail.gmail.com>
2018-06-12 19:13 ` [U-Boot] [RFC PATCH 0/2] ARM: v7: Enable basic framework for supporting bits for CVE-2017-5715 Nishanth Menon
2018-06-12 21:40 ` Russell King - ARM Linux
2018-06-12 21:58 ` Nishanth Menon [this message]
2018-06-13 10:08 ` Russell King - ARM Linux
2018-06-13 13:24 ` Nishanth Menon
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