public inbox for linux-arm-kernel@lists.infradead.org
 help / color / mirror / Atom feed
From: nm@ti.com (Nishanth Menon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/4] ARM: Introduce ability to enable invalidate of BTB with ICIALLU on Cortex-A15 for CVE-2017-5715
Date: Wed, 13 Jun 2018 08:32:15 -0500	[thread overview]
Message-ID: <20180613133215.2cv7iyjb2laaha3j@kahuna> (raw)
In-Reply-To: <8fac2f1c-ecc4-1aa1-0620-8ac6e2efdbf1@gmail.com>

On 23:05-20180612, Marek Vasut wrote:
> On 06/12/2018 10:24 PM, Nishanth Menon wrote:
[..]
> > +#ifdef CONFIG_ARM_CORTEX_A15_CVE_2017_5715
> > +	mrc	p15, 0, r0, c1, c0, 1	@ read auxilary control register
> > +	orr	r0, r0, #1 << 0		@ Enable invalidates of BTB
> 
> Can we use BIT() macro in the assembler code too ?

Probably, but just following convention in the rest of the file. Do we
want to change from existing code?

-- 
Regards,
Nishanth Menon

  reply	other threads:[~2018-06-13 13:32 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-12 20:24 [PATCH 0/4] ARM: Provide workaround setup bits for CVE-2017-5715 (A8/A15) Nishanth Menon
2018-06-12 20:24 ` [PATCH 1/4] ARM: Introduce ability to enable ACR::IBE on Cortex-A8 for CVE-2017-5715 Nishanth Menon
2018-06-20 14:13   ` Fabio Estevam
2018-06-29 20:53   ` [U-Boot, " Tom Rini
2018-06-12 20:24 ` [PATCH 2/4] ARM: Introduce ability to enable invalidate of BTB with ICIALLU on Cortex-A15 " Nishanth Menon
2018-06-12 23:05   ` Marek Vasut
2018-06-13 13:32     ` Nishanth Menon [this message]
2018-06-13 15:46       ` Tom Rini
2018-06-13 21:32         ` Nishanth Menon
2018-06-13 23:06           ` Marek Vasut
2018-06-13  0:30   ` Florian Fainelli
2018-06-13 13:37     ` Nishanth Menon
2018-06-13 21:36       ` Florian Fainelli
2018-06-14 12:46         ` Nishanth Menon
2018-06-20 14:14   ` Fabio Estevam
2018-06-29 20:53   ` [U-Boot, " Tom Rini
2018-06-12 20:24 ` [PATCH 3/4] ARM: mach-omap2: omap5/dra7: Enable ACTLR[0] (Enable invalidates of BTB) to facilitate CVE_2017-5715 WA in OS Nishanth Menon
2018-06-12 23:06   ` Marek Vasut
2018-06-13 13:40     ` Nishanth Menon
2018-06-13 17:36     ` Russell King - ARM Linux
2018-06-13 20:36       ` Marek Vasut
2018-06-13 21:31         ` Nishanth Menon
2018-06-13 21:47         ` Russell King - ARM Linux
2018-06-29 20:53   ` [U-Boot, " Tom Rini
2018-06-12 20:24 ` [PATCH 4/4] ARM: mach-omap2: omap3/am335x: Enable ACR::IBE on Cortex-A8 SoCs for CVE-2017-5715 Nishanth Menon
2018-06-29 20:53   ` [U-Boot, " Tom Rini
2018-06-12 23:06 ` [PATCH 0/4] ARM: Provide workaround setup bits for CVE-2017-5715 (A8/A15) Marek Vasut
2018-06-18 18:48 ` [U-Boot] " Tom Rini

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180613133215.2cv7iyjb2laaha3j@kahuna \
    --to=nm@ti.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox