From: andrea.merello@gmail.com (Andrea Merello)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/6] dt-bindings: xilinx_dma: add required xlnx, lengthregwidth property
Date: Wed, 20 Jun 2018 10:36:50 +0200 [thread overview]
Message-ID: <20180620083653.17010-3-andrea.merello@gmail.com> (raw)
In-Reply-To: <20180620083653.17010-1-andrea.merello@gmail.com>
The width of the "length register" cannot be autodetected, and it is now
specified with a DT property. Add DOC for it.
Signed-off-by: Andrea Merello <andrea.merello@gmail.com>
---
Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
index a2b8bfaec43c..acecdc5d8d47 100644
--- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
+++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
@@ -36,6 +36,8 @@ Required properties:
Required properties for VDMA:
- xlnx,num-fstores: Should be the number of framebuffers as configured in h/w.
+Required properties for AXI DMA:
+- xlnx,lengthregwidth: Should be the width of the length register as configured in h/w.
Optional properties:
- xlnx,include-sg: Tells configured for Scatter-mode in
--
2.17.1
next prev parent reply other threads:[~2018-06-20 8:36 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-20 8:36 [PATCH 1/6] dmaengine: xilinx_dma: fix splitting transfer causes misalignments Andrea Merello
2018-06-20 8:36 ` [PATCH 2/6] dmaengine: xilinx_dma: fix completion callback is not invoked for each DMA operation Andrea Merello
2018-06-20 12:36 ` Radhey Shyam Pandey
2018-06-20 13:32 ` Andrea Merello
2018-06-21 13:46 ` Radhey Shyam Pandey
2018-06-20 8:36 ` Andrea Merello [this message]
2018-06-20 13:42 ` [PATCH 3/6] dt-bindings: xilinx_dma: add required xlnx,lengthregwidth property Radhey Shyam Pandey
2018-06-20 14:37 ` Radhey Shyam Pandey
2018-06-20 8:36 ` [PATCH 4/6] dmaengine: xilinx_dma: fix hardcoded maximum transfer length may be wrong Andrea Merello
2018-06-20 8:36 ` [PATCH 5/6] dmaengine: xilinx_dma: autodetect whether the HW supports scatter-gather Andrea Merello
2018-06-20 14:43 ` Radhey Shyam Pandey
2018-06-20 14:57 ` Andrea Merello
2018-06-20 8:36 ` [PATCH 6/6] dt-bindings: xilinx_dma: drop has-sg property Andrea Merello
2018-06-20 11:37 ` [PATCH 1/6] dmaengine: xilinx_dma: fix splitting transfer causes misalignments Radhey Shyam Pandey
2018-06-20 13:15 ` Andrea Merello
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