From: christoffer.dall@arm.com (Christoffer Dall)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 0/4] KVM: arm/arm64: vgic: Virtual interrupt grouping support
Date: Fri, 29 Jun 2018 12:45:39 +0200 [thread overview]
Message-ID: <20180629104539.GG8441@e113682-lin.lund.arm.com> (raw)
In-Reply-To: <86d0w9zysj.wl-marc.zyngier@arm.com>
On Fri, Jun 29, 2018 at 11:12:44AM +0100, Marc Zyngier wrote:
> On Fri, 29 Jun 2018 10:28:16 +0100,
> Christoffer Dall <christoffer.dall@arm.com> wrote:
> >
> > On Fri, Jun 29, 2018 at 10:11:27AM +0100, Marc Zyngier wrote:
> > > On Mon, 25 Jun 2018 12:56:03 +0100,
> > > Christoffer Dall <christoffer.dall@arm.com> wrote:
> > > >
> > > > On Mon, Jun 25, 2018 at 12:13:47PM +0200, Christoffer Dall wrote:
> > > > > On Mon, Jun 25, 2018 at 10:52:41AM +0100, Peter Maydell wrote:
> > > > > Interesting. For GICv2, I think this will actually break, and the
> > > > > migrated Linux guest won't see any interrupts anymore (Linux only sets
> > > > > bit 0 in GICD_CTLR). For GICv3, everything stays group 1 unless the
> > > > > guest is specifically trying to configure group 0 for something.
> > > > >
> > > > > I suppose this means we need to let userspace request
> > > > > ARCH_COMPLIANT_GICV2 and otherwise ignore userspace writes to IGROUPR?
> > > > >
> > > > Alternatively, we could deny (fail) migration where the
> > > > GICD_IIDR.Revision does not match the source, and just let userspace fix
> > > > things up. Thoughts?
> > >
> > > That's exactly the kind of thing I had in mind when I suggested to
> > > bump up the IIDR. It allows us to push the knowledge of the quirks to
> > > both the guest and userspace, instead of adding more esoteric API
> > > features.
> > >
> >
> > The problem with that is that upgrading the kernel (but not QEMU) on
> > your destination machine now breaks migration. Is that acceptable?
>
> Each time we add a new sysreg, we do break migration as well (in the
> other direction though), and I'm not sure we can do much about it
> (that's a QEMU policy, and not the kernel's).
>
> What we could do is to allow IIDR to be written from userspace, and
> pick one behaviour or the other. This would allow compatibility in the
> forward direction, at least, and we have the ITS as a precedent for
> this behaviour.
>
To make things work without imposing an ordering requirement on the
order of GIC register restore, we could then zero all groups when
writing the old IIDR and ignore future writes to GICD_IGROUPR from that
point, and otherwise not do anything for the IIDR. Esssentially doing
the conversion in the kernel. Might not be too bad actually.
Thanks,
-Christoffer
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next prev parent reply other threads:[~2018-06-29 10:45 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-24 22:10 [PATCH 0/4] KVM: arm/arm64: vgic: Virtual interrupt grouping support Christoffer Dall
2018-06-24 22:11 ` [PATCH 1/4] KVM: arm/arm64: GICv2 IGROUPR should read as zero Christoffer Dall
2018-06-25 9:59 ` Andre Przywara
2018-06-24 22:11 ` [PATCH 2/4] KVM: arm/arm64: vgic: Add group field to struct irq Christoffer Dall
2018-06-25 10:00 ` Andre Przywara
2018-06-24 22:11 ` [PATCH 3/4] KVM: arm/arm64: Signal IRQs using their configured group Christoffer Dall
2018-06-25 10:00 ` Andre Przywara
2018-06-24 22:11 ` [PATCH 4/4] KVM: arm/arm64: vgic: Allow VMs to configure interrupt groups Christoffer Dall
2018-06-25 8:19 ` Marc Zyngier
2018-06-25 9:34 ` Christoffer Dall
2018-06-25 9:44 ` Marc Zyngier
2018-06-25 9:53 ` Christoffer Dall
2018-06-25 9:52 ` [PATCH 0/4] KVM: arm/arm64: vgic: Virtual interrupt grouping support Peter Maydell
2018-06-25 10:13 ` Christoffer Dall
2018-06-25 11:56 ` Christoffer Dall
2018-06-29 9:11 ` Marc Zyngier
2018-06-29 9:28 ` Christoffer Dall
2018-06-29 10:12 ` Marc Zyngier
2018-06-29 10:45 ` Christoffer Dall [this message]
2018-06-25 9:59 ` Andre Przywara
2018-06-25 10:05 ` Christoffer Dall
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