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From: takahiro.akashi@linaro.org (takahiro.akashi at linaro.org)
To: linux-arm-kernel@lists.infradead.org
Subject: panic kexec broken on ARM64?
Date: Thu, 5 Jul 2018 19:18:23 +0900	[thread overview]
Message-ID: <20180705101821.GN28220@linaro.org> (raw)
In-Reply-To: <3df2d32d-867b-2237-d2a0-9fd6d7302eb3@arm.com>

On Wed, Jul 04, 2018 at 01:47:11PM +0100, James Morse wrote:
> Hi Akashi,
> 
> On 04/07/18 09:41, takahiro.akashi at linaro.org wrote:
> > On Tue, Jul 03, 2018 at 09:58:44AM +0100, Marc Zyngier wrote:
> >> On 03/07/18 08:01, takahiro.akashi at linaro.org wrote:
> >>> On Sun, Jun 10, 2018 at 01:24:17PM +0100, Marc Zyngier wrote:
> >>>> On Wed, 06 Jun 2018 12:37:02 +0100 James Morse wrote:,
> >>>>> Bingo: its the lan78xx driver that is sleeping from the irqchip
> >>>>> callbacks; The smsc95xx driver doesn't have a struct irq_chip, which
> >>>>> is why the RPi-3-B doesn't do this.
> >>>>>
> >>>>> It may be valid for kdump to only teardown the 'root irqdomain' (if
> >>>>> that even means anything). I assume these secondary irqchip's would
> >>>>> have a summary-interrupt that goes to another irqchip. But I can't
> >>>>> see a way to tell them apart..,
> 
> >>>> Overall, I can't think of an easy fix. We have a few options, but none
> >>>> of them involve a centralised change:
> >>>>
> >>>> 1) We provide a reset infrastructure for irqchips, with an opt-in
> >>>>    mechanism. This involves changing the way we teardown irqs at
> >>>>    crash-time, and we'd then need some notion of reset ordering (think
> >>>>    of the layered ITS and GICv3, for example).
> >>>
> >>> Does this mean that all the irqchips have to be implemented with reset?
> >>
> >> No. Only those that want to be reset at kexec time.
> > 
> > I don't get the point yet.
> 
> (this stuff is new to me, below terminology is probably wrong:)
> 
> It seems there is actually a tree of irqchips, which feed interrupts through the
> tree via some summary-interrupt.
> The problem is one of these later-irqchips is on the other end of the USB bus,
> and requires a fair amount of sleeping in order to reset it.
> 
> The trick is everything comes through the root irqchip. So we can reset that to
> disable all the other interrupts in this tree.
> 
> This only works until the new kernel re-enables the summary-interrupt, it needs
> to reset the irqchip that the summary-interrupt leads to first.
> 
> (I assume shared summary-interrupts are somehow forbidden).

So you are choking at the "root" irqchip?
Is this safe when a new (kdump) kernel starts up and re-initialises
irq hierarchy?

-Takahiro AKASHI

> 
> > Who should have reset interface?
> > What is the criteria?
> 
> (reset-interface -> be reset at kdump time)
> 
> Just the root irchip that all interrupts have to come through.
> 
> 
> Thanks,
> 
> James

  reply	other threads:[~2018-07-05 10:18 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-05  8:01 panic kexec broken on ARM64? Petr Tesarik
2018-06-05 17:46 ` James Morse
2018-06-06  7:02   ` Stefan Wahren
2018-06-06  8:00     ` Petr Tesarik
2018-06-06 11:41       ` Petr Tesarik
2018-06-06 11:37     ` James Morse
2018-06-10 12:24       ` Marc Zyngier
2018-07-03  7:01         ` takahiro.akashi at linaro.org
2018-07-03  8:58           ` Marc Zyngier
2018-07-04  8:41             ` takahiro.akashi at linaro.org
2018-07-04  9:02               ` Marc Zyngier
2018-07-05 10:13                 ` takahiro.akashi at linaro.org
2018-07-05 10:19                   ` Marc Zyngier
2018-08-02 15:49                     ` David Woodhouse
2018-08-03  6:06                       ` Marc Zyngier
2018-07-04 12:47               ` James Morse
2018-07-05 10:18                 ` takahiro.akashi at linaro.org [this message]
2018-07-04 14:08             ` Matthias Brugger
2018-07-04 14:20               ` Marc Zyngier
2018-06-06  5:36 ` Bhupesh Sharma
2018-06-06  7:58   ` Petr Tesarik

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