* [GIT PULL] arm64: fixes for -rc7
@ 2018-07-27 11:51 Will Deacon
0 siblings, 0 replies; 25+ messages in thread
From: Will Deacon @ 2018-07-27 11:51 UTC (permalink / raw)
To: linux-arm-kernel
Hi Linus,
Inevitably, after saying that I hoped we would be done on the fixes front,
a couple of issues have cropped up over the last week. Next time I'll stay
schtum.
As usual, details are in the tag, but we've fixed an over-eager BUILD_BUG_ON()
which Arnd ran into with arndconfig, as well as ensuring that KPTI really
is disabled on Thunder-X1, where the cure is worse than the disease (this
regressed when we reworked the heterogeneous CPU feature checking).
Please pull.
Thanks,
Will
--->8
The following changes since commit d72e90f33aa4709ebecc5005562f52335e106a60:
Linux 4.18-rc6 (2018-07-22 14:12:20 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git tags/arm64-fixes
for you to fetch changes up to 7b0eb6b41a08fa1fa0d04b1c53becd62b5fbfaee:
arm64: fix vmemmap BUILD_BUG_ON() triggering on !vmemmap setups (2018-07-25 13:32:30 +0100)
----------------------------------------------------------------
More arm64 fixes:
- Fix disabling of kpti on Thunder-X machines
- Fix premature BUILD_BUG_ON() found with randconfig
----------------------------------------------------------------
Dirk Mueller (1):
arm64: Check for errata before evaluating cpu features
Johannes Weiner (1):
arm64: fix vmemmap BUILD_BUG_ON() triggering on !vmemmap setups
arch/arm64/kernel/cpufeature.c | 4 ++--
arch/arm64/mm/init.c | 4 +++-
2 files changed, 5 insertions(+), 3 deletions(-)
^ permalink raw reply [flat|nested] 25+ messages in thread
* [GIT PULL] arm64 fixes for -rc7
@ 2025-03-14 16:04 Will Deacon
2025-03-14 20:34 ` Linus Torvalds
2025-03-14 21:03 ` pr-tracker-bot
0 siblings, 2 replies; 25+ messages in thread
From: Will Deacon @ 2025-03-14 16:04 UTC (permalink / raw)
To: torvalds; +Cc: catalin.marinas, linux-arm-kernel, linux-kernel, kernel-team
Hi Linus,
Please pull this pair of arm64 mm fixes for -rc7.
Summary in the tag, but the main one is a horrible macro fix for our
TLB flushing code which resulted in over-invalidation on the MMU
notifier path.
Cheers,
Will
--->8
The following changes since commit eed6bfa8b28230382b797a88569f2c7569a1a419:
arm64: hugetlb: Fix flush_hugetlb_tlb_range() invalidation level (2025-02-27 17:40:58 +0000)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git tags/arm64-fixes
for you to fetch changes up to f7edb07ad7c66eab3dce57384f33b9799d579133:
Fix mmu notifiers for range-based invalidates (2025-03-11 11:37:43 +0000)
----------------------------------------------------------------
arm64 fixes for -rc7
- Fix population of the vmemmap for regions of memory that are smaller
than a section (128 MiB)
- Fix range-based TLB over-invalidation when invoked via a MMU notifier
----------------------------------------------------------------
Piotr Jaroszynski (1):
Fix mmu notifiers for range-based invalidates
Zhenhua Huang (1):
arm64: mm: Populate vmemmap at the page level if not section aligned
arch/arm64/include/asm/tlbflush.h | 22 ++++++++++++----------
arch/arm64/mm/mmu.c | 5 ++++-
2 files changed, 16 insertions(+), 11 deletions(-)
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [GIT PULL] arm64 fixes for -rc7
2025-03-14 16:04 [GIT PULL] arm64 " Will Deacon
@ 2025-03-14 20:34 ` Linus Torvalds
2025-03-17 16:00 ` Will Deacon
2025-03-14 21:03 ` pr-tracker-bot
1 sibling, 1 reply; 25+ messages in thread
From: Linus Torvalds @ 2025-03-14 20:34 UTC (permalink / raw)
To: Will Deacon; +Cc: catalin.marinas, linux-arm-kernel, linux-kernel, kernel-team
On Fri, 14 Mar 2025 at 06:05, Will Deacon <will@kernel.org> wrote:
>
> Summary in the tag, but the main one is a horrible macro fix for our
> TLB flushing code which resulted in over-invalidation on the MMU
> notifier path.
From a quick look, that macro is still quite broken. Maybe not in ways
that matter, but still...
In particular, the 'stride' argument is used multiple times, and
without parentheses.
The 'lpa' argument is also used multiple times, and the input to that
is typically something like kvm_lpa2_is_enabled(), so I think it
potentially generates lots of pointless duplicate code with that
BUG_ON() in system_supports_lpa2() -> cpus_have_final_cap().
Maybe the compiler figures it out. But that macro is bad, bad, bad.
When it looks like a function, it should act like a function, and not
evaluate its arguments multiple times.
The most immediate bug may have been fixed, but not the actual real
horror of that thing.
Linus
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [GIT PULL] arm64 fixes for -rc7
2025-03-14 20:34 ` Linus Torvalds
@ 2025-03-17 16:00 ` Will Deacon
2025-03-18 11:43 ` Will Deacon
2025-03-18 11:46 ` Marc Zyngier
0 siblings, 2 replies; 25+ messages in thread
From: Will Deacon @ 2025-03-17 16:00 UTC (permalink / raw)
To: Linus Torvalds
Cc: catalin.marinas, linux-arm-kernel, linux-kernel, kernel-team, maz,
rananta
Hi Linus,
On Fri, Mar 14, 2025 at 10:34:57AM -1000, Linus Torvalds wrote:
> On Fri, 14 Mar 2025 at 06:05, Will Deacon <will@kernel.org> wrote:
> >
> > Summary in the tag, but the main one is a horrible macro fix for our
> > TLB flushing code which resulted in over-invalidation on the MMU
> > notifier path.
>
> From a quick look, that macro is still quite broken. Maybe not in ways
> that matter, but still...
>
> In particular, the 'stride' argument is used multiple times, and
> without parentheses.
>
> The 'lpa' argument is also used multiple times, and the input to that
> is typically something like kvm_lpa2_is_enabled(), so I think it
> potentially generates lots of pointless duplicate code with that
> BUG_ON() in system_supports_lpa2() -> cpus_have_final_cap().
>
> Maybe the compiler figures it out. But that macro is bad, bad, bad.
> When it looks like a function, it should act like a function, and not
> evaluate its arguments multiple times.
>
> The most immediate bug may have been fixed, but not the actual real
> horror of that thing.
Yes, the minimal fix for -rc7 avoids explicitly mutating the macro
arguments but we still have the multiple-evaluation problem you point
out above.
Ideally, this function would be rewritten as a 'static inline' but it
was moved from C code into a macro as part of 360839027a6e ("arm64: tlb:
Refactor the core flush algorithm of __flush_tlb_range") because we need
to propagate the 'op' argument down to the low-level asm where it's
stringified as part of the instruction mnemonic.
I'll have a crack at reworking things to take a 'const char *' instead,
but it won't be for 6.14 as it'll be reasonably invasive.
Will
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [GIT PULL] arm64 fixes for -rc7
2025-03-17 16:00 ` Will Deacon
@ 2025-03-18 11:43 ` Will Deacon
2025-03-18 11:46 ` Marc Zyngier
1 sibling, 0 replies; 25+ messages in thread
From: Will Deacon @ 2025-03-18 11:43 UTC (permalink / raw)
To: Linus Torvalds
Cc: catalin.marinas, linux-arm-kernel, linux-kernel, kernel-team, maz,
rananta
On Mon, Mar 17, 2025 at 04:00:35PM +0000, Will Deacon wrote:
> I'll have a crack at reworking things to take a 'const char *' instead,
> but it won't be for 6.14 as it'll be reasonably invasive.
Bah, that doesn't work at all because we need a string literal for the
asm and I can't spot any constraints that allow you to pass in a string.
So a different flavour of surgery is required...
Will
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [GIT PULL] arm64 fixes for -rc7
2025-03-17 16:00 ` Will Deacon
2025-03-18 11:43 ` Will Deacon
@ 2025-03-18 11:46 ` Marc Zyngier
1 sibling, 0 replies; 25+ messages in thread
From: Marc Zyngier @ 2025-03-18 11:46 UTC (permalink / raw)
To: Will Deacon
Cc: Linus Torvalds, catalin.marinas, linux-arm-kernel, linux-kernel,
kernel-team, rananta
On Mon, 17 Mar 2025 16:00:35 +0000,
Will Deacon <will@kernel.org> wrote:
>
> Hi Linus,
>
> On Fri, Mar 14, 2025 at 10:34:57AM -1000, Linus Torvalds wrote:
> > On Fri, 14 Mar 2025 at 06:05, Will Deacon <will@kernel.org> wrote:
> > >
> > > Summary in the tag, but the main one is a horrible macro fix for our
> > > TLB flushing code which resulted in over-invalidation on the MMU
> > > notifier path.
> >
> > From a quick look, that macro is still quite broken. Maybe not in ways
> > that matter, but still...
> >
> > In particular, the 'stride' argument is used multiple times, and
> > without parentheses.
> >
> > The 'lpa' argument is also used multiple times, and the input to that
> > is typically something like kvm_lpa2_is_enabled(), so I think it
> > potentially generates lots of pointless duplicate code with that
> > BUG_ON() in system_supports_lpa2() -> cpus_have_final_cap().
> >
> > Maybe the compiler figures it out. But that macro is bad, bad, bad.
> > When it looks like a function, it should act like a function, and not
> > evaluate its arguments multiple times.
> >
> > The most immediate bug may have been fixed, but not the actual real
> > horror of that thing.
>
> Yes, the minimal fix for -rc7 avoids explicitly mutating the macro
> arguments but we still have the multiple-evaluation problem you point
> out above.
>
> Ideally, this function would be rewritten as a 'static inline' but it
> was moved from C code into a macro as part of 360839027a6e ("arm64: tlb:
> Refactor the core flush algorithm of __flush_tlb_range") because we need
> to propagate the 'op' argument down to the low-level asm where it's
> stringified as part of the instruction mnemonic.
>
> I'll have a crack at reworking things to take a 'const char *' instead,
> but it won't be for 6.14 as it'll be reasonably invasive.
I had a go at the 'const char *' approach, but couldn't make it work
reliably without making it very invasive.
I ended up with a slightly bigger hammer (see below) that survived
booting on a test box and running a couple of VMs. I wouldn't trust it
with anything more important than that though.
M.
diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
index 8104aee4f9a08..0ff635cf8abf5 100644
--- a/arch/arm64/include/asm/tlbflush.h
+++ b/arch/arm64/include/asm/tlbflush.h
@@ -393,45 +393,93 @@ static inline void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch)
* operations can only span an even number of pages. We save this for last to
* ensure 64KB start alignment is maintained for the LPA2 case.
*/
+typedef void (*tlbi_level_fn_t)(u64, int);
+typedef void (*tlbi_fn_t)(u64);
+
+#define __TLBI_LEVEL_FN(t, s) \
+static inline void tlbi_level_##t##s(u64 addr, int level) \
+{ \
+ __tlbi_level(t##s, addr, level); \
+} \
+static inline void tlbi_user_level_##t##s(u64 addr, int level) \
+{ \
+ __tlbi_user_level(t##s, addr, level); \
+}
+
+#define __TLBI_FN(t, s) \
+static inline void tlbi_##t##s(u64 addr) \
+{ \
+ __tlbi(t##s, addr); \
+} \
+static inline void tlbi_user_##t##s(u64 addr) \
+{ \
+ __tlbi_user(t##s, addr); \
+}
+
+#define TLBI_FNS(t) \
+ __TLBI_FN(t, ) \
+ __TLBI_FN(t, is) \
+ __TLBI_FN(r##t, ) \
+ __TLBI_FN(r##t, is) \
+ __TLBI_LEVEL_FN(t, ) \
+ __TLBI_LEVEL_FN(t, is) \
+ __TLBI_LEVEL_FN(r##t, ) \
+ __TLBI_LEVEL_FN(r##t, is)
+
+/* These are the TLBI instructions we allow for range operation */
+TLBI_FNS(ipas2e1)
+TLBI_FNS(vae1)
+TLBI_FNS(vale1)
+TLBI_FNS(vaale1)
+
+static __always_inline
+void __flush_tlb_range_by_op(tlbi_level_fn_t il, tlbi_level_fn_t iul,
+ tlbi_fn_t ri, tlbi_fn_t riu,
+ u64 start, u64 pages, int stride,
+ u16 asid, int tlb_level,
+ bool tlbi_user, bool lpa2)
+{
+ int num = 0;
+ int scale = 3;
+ int shift = lpa2 ? 16 : PAGE_SHIFT;
+ unsigned long addr;
+
+ while (pages > 0) {
+ if (!system_supports_tlb_range() ||
+ pages == 1 ||
+ (lpa2 && start != ALIGN(start, SZ_64K))) {
+ addr = __TLBI_VADDR(start, asid);
+ il(addr, tlb_level);
+ if (tlbi_user)
+ iul(addr, tlb_level);
+ start += stride;
+ pages -= stride >> PAGE_SHIFT;
+ continue;
+ }
+
+ num = __TLBI_RANGE_NUM(pages, scale);
+ if (num >= 0) {
+ addr = __TLBI_VADDR_RANGE(start >> shift, asid,
+ scale, num, tlb_level);
+ ri(addr);
+ if (tlbi_user)
+ riu(addr);
+ start += __TLBI_RANGE_PAGES(num, scale) << PAGE_SHIFT;
+ pages -= __TLBI_RANGE_PAGES(num, scale);
+ }
+ scale--;
+ }
+}
+
#define __flush_tlb_range_op(op, start, pages, stride, \
- asid, tlb_level, tlbi_user, lpa2) \
-do { \
- typeof(start) __flush_start = start; \
- typeof(pages) __flush_pages = pages; \
- int num = 0; \
- int scale = 3; \
- int shift = lpa2 ? 16 : PAGE_SHIFT; \
- unsigned long addr; \
- \
- while (__flush_pages > 0) { \
- if (!system_supports_tlb_range() || \
- __flush_pages == 1 || \
- (lpa2 && __flush_start != ALIGN(__flush_start, SZ_64K))) { \
- addr = __TLBI_VADDR(__flush_start, asid); \
- __tlbi_level(op, addr, tlb_level); \
- if (tlbi_user) \
- __tlbi_user_level(op, addr, tlb_level); \
- __flush_start += stride; \
- __flush_pages -= stride >> PAGE_SHIFT; \
- continue; \
- } \
- \
- num = __TLBI_RANGE_NUM(__flush_pages, scale); \
- if (num >= 0) { \
- addr = __TLBI_VADDR_RANGE(__flush_start >> shift, asid, \
- scale, num, tlb_level); \
- __tlbi(r##op, addr); \
- if (tlbi_user) \
- __tlbi_user(r##op, addr); \
- __flush_start += __TLBI_RANGE_PAGES(num, scale) << PAGE_SHIFT; \
- __flush_pages -= __TLBI_RANGE_PAGES(num, scale);\
- } \
- scale--; \
- } \
-} while (0)
+ asid, tlb_level, tlbi_user, lpa2) \
+ __flush_tlb_range_by_op(tlbi_level_##op, tlbi_user_level_##op, \
+ tlbi_r##op, tlbi_user_r##op, \
+ start, pages, stride, asid, \
+ tlb_level, tlbi_user, lpa2)
#define __flush_s2_tlb_range_op(op, start, pages, stride, tlb_level) \
- __flush_tlb_range_op(op, start, pages, stride, 0, tlb_level, false, kvm_lpa2_is_enabled());
+ __flush_tlb_range_op(op, start, pages, stride, 0, tlb_level, false, kvm_lpa2_is_enabled())
static inline bool __flush_tlb_range_limit_excess(unsigned long start,
unsigned long end, unsigned long pages, unsigned long stride)
--
Without deviation from the norm, progress is not possible.
^ permalink raw reply related [flat|nested] 25+ messages in thread
* Re: [GIT PULL] arm64 fixes for -rc7
2025-03-14 16:04 [GIT PULL] arm64 " Will Deacon
2025-03-14 20:34 ` Linus Torvalds
@ 2025-03-14 21:03 ` pr-tracker-bot
1 sibling, 0 replies; 25+ messages in thread
From: pr-tracker-bot @ 2025-03-14 21:03 UTC (permalink / raw)
To: Will Deacon
Cc: torvalds, catalin.marinas, linux-arm-kernel, linux-kernel,
kernel-team
The pull request you sent on Fri, 14 Mar 2025 16:04:59 +0000:
> git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git tags/arm64-fixes
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/ef9248676f81c0342d6e8f90a380a9e0b8c25280
Thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/prtracker.html
^ permalink raw reply [flat|nested] 25+ messages in thread
* [GIT PULL] arm64 fixes for -rc7
@ 2024-11-08 11:57 Will Deacon
2024-11-08 17:39 ` pr-tracker-bot
0 siblings, 1 reply; 25+ messages in thread
From: Will Deacon @ 2024-11-08 11:57 UTC (permalink / raw)
To: torvalds; +Cc: catalin.marinas, linux-arm-kernel, linux-kernel, kernel-team
Hi Linus,
As promised, here is a (hopefully) final round of arm64 fixes for 6.12
that address some user-visible floating point register corruption. Both
of the Marks have been working on this for a couple of weeks and we've
ended up in a position where SVE is solid but SME still has enough
pending issues that the most pragmatic solution for the release and
stable backports is to disable the feature. Yes, it's a shame, but the
hardware is rare as hen's teeth at the moment and we're better off
getting back to a known good state before fixing it all properly. We're
also improving the selftests for 6.13 to help avoid merging broken code
in the future.
Anyway, the good news is that we're removing a lot more code than we're
adding.
Cheers,
Will
--->8
The following changes since commit 2e8a1acea8597ff42189ea94f0a63fa58640223d:
arm64: signal: Improve POR_EL0 handling to avoid uaccess failures (2024-10-29 17:59:12 +0000)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git tags/arm64-fixes
for you to fetch changes up to 81235ae0c846e1fb46a2c6fe9283fe2b2b24f7dc:
arm64: Kconfig: Make SME depend on BROKEN for now (2024-11-07 11:20:35 +0000)
----------------------------------------------------------------
arm64 fixes for -rc7
- Fix handling of SVE traps from userspace on preemptible kernels when
converting the saved floating point state into SVE state.
- Remove broken support for the SMCCCv1.3 "SVE discard hint"
optimisation.
- Disable SME support, as the current support code suffers from numerous
issues around signal delivery, ptrace access and context-switch which
can lead to user-visible corruption of the register state.
----------------------------------------------------------------
Mark Brown (1):
arm64/sve: Discard stale CPU state when handling SVE traps
Mark Rutland (2):
arm64: smccc: Remove broken support for SMCCCv1.3 SVE discard hint
arm64: Kconfig: Make SME depend on BROKEN for now
arch/arm64/Kconfig | 1 +
arch/arm64/kernel/fpsimd.c | 1 +
arch/arm64/kernel/smccc-call.S | 35 +++--------------------------------
drivers/firmware/smccc/smccc.c | 4 ----
include/linux/arm-smccc.h | 32 +++-----------------------------
5 files changed, 8 insertions(+), 65 deletions(-)
^ permalink raw reply [flat|nested] 25+ messages in thread
* [GIT PULL] arm64 fixes for -rc7
@ 2022-09-23 18:28 Will Deacon
2022-09-23 22:43 ` Linus Torvalds
2022-09-23 22:53 ` pr-tracker-bot
0 siblings, 2 replies; 25+ messages in thread
From: Will Deacon @ 2022-09-23 18:28 UTC (permalink / raw)
To: torvalds; +Cc: catalin.marinas, linux-arm-kernel, linux-kernel, kernel-team
Hi Linus,
Please pull these arm64 fixes for -rc7. They're all very simple and
self-contained, although the CFI jump-table fix touches the generic
linker script as that's where the problematic macro lives.
Summary in the tag.
Cheers,
Will
--->8
The following changes since commit 3fe3fd5f30720b4afd3345cc186808125e7f5848:
arm64: mm: fix resume for 52-bit enabled builds (2022-09-10 14:46:28 +0100)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git tags/arm64-fixes
for you to fetch changes up to 13b0566962914e167cb3238fbe29ced618f07a27:
vmlinux.lds.h: CFI: Reduce alignment of jump-table to function alignment (2022-09-23 13:39:01 +0100)
----------------------------------------------------------------
arm64 fixes for -rc7
- Fix false positive "sleeping while atomic" warning resulting from
the kPTI rework taking a mutex too early.
- Fix possible overflow in AMU frequency calculation
- Fix incorrect shift in CMN PMU driver which causes problems with
newer versions of the IP
- Reduce alignment of the CFI jump table to avoid huge kernel images
and link errors with !4KiB page size configurations
----------------------------------------------------------------
Ilkka Koskinen (1):
perf/arm-cmn: Add more bits to child node address offset field
Mark Rutland (1):
arm64: mm: don't acquire mutex when rewriting swapper
Sergey Shtylyov (1):
arm64: topology: fix possible overflow in amu_fie_setup()
Will Deacon (1):
vmlinux.lds.h: CFI: Reduce alignment of jump-table to function alignment
arch/arm64/kernel/topology.c | 2 +-
arch/arm64/mm/mmu.c | 32 ++++++++++++++++++--------------
drivers/perf/arm-cmn.c | 2 +-
include/asm-generic/vmlinux.lds.h | 3 +--
4 files changed, 21 insertions(+), 18 deletions(-)
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [GIT PULL] arm64 fixes for -rc7
2022-09-23 18:28 Will Deacon
@ 2022-09-23 22:43 ` Linus Torvalds
2022-09-28 10:46 ` Mark Rutland
2022-09-23 22:53 ` pr-tracker-bot
1 sibling, 1 reply; 25+ messages in thread
From: Linus Torvalds @ 2022-09-23 22:43 UTC (permalink / raw)
To: Will Deacon; +Cc: catalin.marinas, linux-arm-kernel, linux-kernel, kernel-team
On Fri, Sep 23, 2022 at 11:28 AM Will Deacon <will@kernel.org> wrote:
>
> Please pull these arm64 fixes for -rc7. They're all very simple and
> self-contained, although the CFI jump-table fix touches the generic
> linker script as that's where the problematic macro lives.
The commit message is a bit confusing. It talks about "hysterical
raisins on x86", but CONFIG_CFI_CLANG has always been arm64-only. No?
So I'm not seeing what the x86 comment is about?
Anyway, pulled. That alignment was obviously horrendous.
Linus
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [GIT PULL] arm64 fixes for -rc7
2022-09-23 22:43 ` Linus Torvalds
@ 2022-09-28 10:46 ` Mark Rutland
0 siblings, 0 replies; 25+ messages in thread
From: Mark Rutland @ 2022-09-28 10:46 UTC (permalink / raw)
To: Linus Torvalds
Cc: Will Deacon, catalin.marinas, linux-arm-kernel, linux-kernel,
kernel-team
On Fri, Sep 23, 2022 at 03:43:05PM -0700, Linus Torvalds wrote:
> On Fri, Sep 23, 2022 at 11:28 AM Will Deacon <will@kernel.org> wrote:
> >
> > Please pull these arm64 fixes for -rc7. They're all very simple and
> > self-contained, although the CFI jump-table fix touches the generic
> > linker script as that's where the problematic macro lives.
>
> The commit message is a bit confusing. It talks about "hysterical
> raisins on x86", but CONFIG_CFI_CLANG has always been arm64-only. No?
>
> So I'm not seeing what the x86 comment is about?
It was a an accidental inclusion inthe ARM64 CFI series while x86 CFI support
was being developed; in the thread in the LINK tage, Sami says:
| This was a leftover from an old x86 series, which was included here by
| mistake. Will also asked me about this a couple of weeks ago, I think, and
| said he'd send a patch to remove it.
The relevant message being:
https://lore.kernel.org/all/CABCJKufrRCb84fafhsR8_fftBLv0_pvufL_ZZieUSTJfhdT+fw@mail.gmail.com/
Thanks,
Mark.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [GIT PULL] arm64 fixes for -rc7
2022-09-23 18:28 Will Deacon
2022-09-23 22:43 ` Linus Torvalds
@ 2022-09-23 22:53 ` pr-tracker-bot
1 sibling, 0 replies; 25+ messages in thread
From: pr-tracker-bot @ 2022-09-23 22:53 UTC (permalink / raw)
To: Will Deacon
Cc: torvalds, catalin.marinas, linux-arm-kernel, linux-kernel,
kernel-team
The pull request you sent on Fri, 23 Sep 2022 19:28:00 +0100:
> git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git tags/arm64-fixes
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/a63f2e7cb1107ab124f80407e5eb8579c04eb7a9
Thank you!
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* [GIT PULL] arm64 fixes for -rc7
@ 2022-05-13 16:52 Will Deacon
2022-05-13 17:30 ` pr-tracker-bot
0 siblings, 1 reply; 25+ messages in thread
From: Will Deacon @ 2022-05-13 16:52 UTC (permalink / raw)
To: torvalds; +Cc: catalin.marinas, linux-arm-kernel, linux-kernel, kernel-team
Hi Linus,
Please pull these three arm64 fixes for -rc7. The summary is in the tag
but it's all pretty straightforward.
Thanks,
Will
--->8
The following changes since commit c35fe2a68f29a0bda15ae994154cacaae5f69791:
elf: Fix the arm64 MTE ELF segment name and value (2022-04-28 11:37:06 +0100)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git tags/arm64-fixes
for you to fetch changes up to 51f559d66527e238f9a5f82027bff499784d4eac:
arm64: Enable repeat tlbi workaround on KRYO4XX gold CPUs (2022-05-12 13:15:38 +0100)
----------------------------------------------------------------
arm64 fixes for -rc7
- TLB invalidation workaround for Qualcomm Kryo-4xx "gold" CPUs
- Fix broken dependency in the vDSO Makefile
- Fix pointer authentication overrides in ISAR2 ID register
----------------------------------------------------------------
Joey Gouly (1):
arm64: vdso: fix makefile dependency on vdso.so
Kristina Martsenko (1):
arm64: cpufeature: remove duplicate ID_AA64ISAR2_EL1 entry
Shreyas K K (1):
arm64: Enable repeat tlbi workaround on KRYO4XX gold CPUs
Documentation/arm64/silicon-errata.rst | 3 +++
arch/arm64/kernel/Makefile | 4 ++++
arch/arm64/kernel/cpu_errata.c | 2 ++
arch/arm64/kernel/cpufeature.c | 3 +--
arch/arm64/kernel/vdso/Makefile | 3 ---
arch/arm64/kernel/vdso32/Makefile | 3 ---
6 files changed, 10 insertions(+), 8 deletions(-)
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* [GIT PULL] arm64 fixes for -rc7
@ 2021-08-20 8:53 Will Deacon
2021-08-20 20:09 ` pr-tracker-bot
0 siblings, 1 reply; 25+ messages in thread
From: Will Deacon @ 2021-08-20 8:53 UTC (permalink / raw)
To: torvalds
Cc: catalin.marinas, linux-arm-kernel, linux-kernel, kernel-team, maz
Hi Linus,
Please pull these two straightforward fixes for -rc7. Summary in the tag.
Cheers,
Will
--->8
The following changes since commit 0c32706dac1b0a72713184246952ab0f54327c21:
arm64: stacktrace: avoid tracing arch_stack_walk() (2021-08-03 10:39:35 +0100)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git tags/arm64-fixes
for you to fetch changes up to bde8fff82e4a4b0f000dbf4d5eadab2079be0b56:
arm64: initialize all of CNTHCTL_EL2 (2021-08-19 10:02:10 +0100)
----------------------------------------------------------------
arm64 fixes for -rc7
- Fix cleaning of vDSO directories
- Ensure CNTHCTL_EL2 is fully initialised when booting at EL2
----------------------------------------------------------------
Andrew Delgadillo (1):
arm64: clean vdso & vdso32 files
Mark Rutland (1):
arm64: initialize all of CNTHCTL_EL2
arch/arm64/Makefile | 2 ++
arch/arm64/include/asm/el2_setup.h | 3 +--
2 files changed, 3 insertions(+), 2 deletions(-)
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* [GIT PULL] arm64 fixes for -rc7
@ 2020-12-02 17:17 Will Deacon
2020-12-02 20:48 ` pr-tracker-bot
0 siblings, 1 reply; 25+ messages in thread
From: Will Deacon @ 2020-12-02 17:17 UTC (permalink / raw)
To: torvalds
Cc: mark.rutland, peterz, catalin.marinas, linux-kernel, kernel-team,
linux-arm-kernel
Hi Linus,
I'm sad to say that we've got an unusually large arm64 fixes pull for
-rc7 which addresses numerous significant instrumentation issues with
our entry code. Without these patches, lockdep is hopelessly unreliable
in some configurations [1,2] and syzkaller is therefore not a lot of use
because it's so noisy. Although much of this has always been broken, it
appears to have been exposed more readily by other changes such as
044d0d6de9f5 ("lockdep: Only trace IRQ edges") and general lockdep
improvements around IRQ tracing and NMIs.
Fixing this properly required moving much of the instrumentation hooks
from our entry assembly into C, which Mark has been working on for the
last few weeks. We're not quite ready to move to the recently added
generic functions yet, but the code here has been deliberately written
to mimic that closely so we can look at cleaning things up once we have
a bit more breathing room.
Having said all that, the second version of these patches was posted
last week and I pushed it into our CI (kernelci and cki) along with a
commit which forced on PROVE_LOCKING, NOHZ_FULL and
CONTEXT_TRACKING_FORCE. The result? We found a real bug in the md/raid10
code [3].
Oh, and there's also a really silly typo patch that's unrelated.
In other words, none of this warrants an -rc8 if you end up considering
it.
Please pull. Cheers,
Will
[1] https://lore.kernel.org/r/CACT4Y+aAzoJ48Mh1wNYD17pJqyEcDnrxGfApir=-j171TnQXhw@mail.gmail.com
[2] https://lore.kernel.org/r/20201119193819.GA2601289@elver.google.com
[3] https://lore.kernel.org/r/94c76d5e-466a-bc5f-e6c2-a11b65c39f83@redhat.com
--->8
The following changes since commit ff1712f953e27f0b0718762ec17d0adb15c9fd0b:
arm64: pgtable: Ensure dirty bit is preserved across pte_wrprotect() (2020-11-23 16:13:18 +0000)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git tags/arm64-fixes
for you to fetch changes up to 9e5344e0ffc33f4fee899f98b6939a0682b1d9c3:
arm64: mte: Fix typo in macro definition (2020-11-30 17:36:52 +0000)
----------------------------------------------------------------
arm64 fixes for -rc7
- Fix numerous issues with instrumentation and exception entry
- Fix hideous typo in unused register field definition
----------------------------------------------------------------
Mark Rutland (11):
arm64: syscall: exit userspace before unmasking exceptions
arm64: mark idle code as noinstr
arm64: entry: mark entry code as noinstr
arm64: entry: move enter_from_user_mode to entry-common.c
arm64: entry: prepare ret_to_user for function call
arm64: entry: move el1 irq/nmi logic to C
arm64: entry: fix non-NMI user<->kernel transitions
arm64: ptrace: prepare for EL1 irq/rcu tracking
arm64: entry: fix non-NMI kernel<->kernel transitions
arm64: entry: fix NMI {user, kernel}->kernel transitions
arm64: entry: fix EL1 debug transitions
Vincenzo Frascino (1):
arm64: mte: Fix typo in macro definition
arch/arm64/include/asm/daifflags.h | 3 +
arch/arm64/include/asm/exception.h | 5 +
arch/arm64/include/asm/ptrace.h | 4 +
arch/arm64/include/asm/sysreg.h | 2 +-
arch/arm64/kernel/entry-common.c | 254 +++++++++++++++++++++++++++----------
arch/arm64/kernel/entry.S | 78 ++++--------
arch/arm64/kernel/irq.c | 15 ---
arch/arm64/kernel/process.c | 8 +-
arch/arm64/kernel/sdei.c | 7 +-
arch/arm64/kernel/syscall.c | 1 -
arch/arm64/kernel/traps.c | 22 ++--
arch/arm64/mm/fault.c | 25 ----
12 files changed, 243 insertions(+), 181 deletions(-)
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^ permalink raw reply [flat|nested] 25+ messages in thread
* [GIT PULL] arm64 fixes for -rc7
@ 2020-03-20 15:35 Will Deacon
2020-03-20 17:15 ` pr-tracker-bot
0 siblings, 1 reply; 25+ messages in thread
From: Will Deacon @ 2020-03-20 15:35 UTC (permalink / raw)
To: torvalds; +Cc: catalin.marinas, kernel-team, linux-kernel, linux-arm-kernel
Hi Linus,
Please pull these four arm64 fixes for -rc7. Summary in the tag.
Cheers,
Will
--->8
The following changes since commit 9abd515a6e4a5c58c6eb4d04110430325eb5f5ac:
arm64: context: Fix ASID limit in boot messages (2020-03-02 12:10:38 +0000)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git tags/arm64-fixes
for you to fetch changes up to 3568b88944fef28db3ee989b957da49ffc627ede:
arm64: compat: Fix syscall number of compat_clock_getres (2020-03-19 19:23:46 +0000)
----------------------------------------------------------------
arm64 fixes for -rc7
- Fix panic() when it occurs during secondary CPU startup
- Fix "kpti=off" when KASLR is enabled
- Fix howler in compat syscall table for vDSO clock_getres() fallback
----------------------------------------------------------------
Cristian Marussi (2):
arm64: smp: fix smp_send_stop() behaviour
arm64: smp: fix crash_smp_send_stop() behaviour
Vincenzo Frascino (1):
arm64: compat: Fix syscall number of compat_clock_getres
Will Deacon (1):
arm64: kpti: Fix "kpti=off" when KASLR is enabled
arch/arm64/include/asm/mmu.h | 4 +---
arch/arm64/include/asm/pgtable-prot.h | 6 ++++--
arch/arm64/include/asm/unistd.h | 2 +-
arch/arm64/kernel/smp.c | 25 ++++++++++++++++++++-----
4 files changed, 26 insertions(+), 11 deletions(-)
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^ permalink raw reply [flat|nested] 25+ messages in thread
* [GIT PULL] arm64: Fixes for -rc7
@ 2019-08-28 17:32 Will Deacon
2019-08-28 17:45 ` pr-tracker-bot
0 siblings, 1 reply; 25+ messages in thread
From: Will Deacon @ 2019-08-28 17:32 UTC (permalink / raw)
To: torvalds
Cc: kvm, rkrcmar, marc.zyngier, catalin.marinas, linux-kernel,
pbonzini, kvmarm, linux-arm-kernel
Hi Linus,
Hot on the heels of our last set of fixes are a few more for -rc7. Two
of them are fixing issues with our virtual interrupt controller
implementation in KVM/arm, while the other is a longstanding but
straightforward kallsyms fix which was been acked by Masami and resolves
an initialisation failure in kprobes observed on arm64.
Please pull, thanks.
Will
--->8
The following changes since commit b6143d10d23ebb4a77af311e8b8b7f019d0163e6:
arm64: ftrace: Ensure module ftrace trampoline is coherent with I-side (2019-08-16 17:40:03 +0100)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git tags/arm64-fixes
for you to fetch changes up to 82e40f558de566fdee214bec68096bbd5e64a6a4:
KVM: arm/arm64: vgic-v2: Handle SGI bits in GICD_I{S,C}PENDR0 as WI (2019-08-28 11:21:42 +0100)
----------------------------------------------------------------
arm64 fixes for -rc7
- Fix GICv2 emulation bug (KVM)
- Fix deadlock in virtual GIC interrupt injection code (KVM)
- Fix kprobes blacklist init failure due to broken kallsyms lookup
----------------------------------------------------------------
Heyi Guo (1):
KVM: arm/arm64: vgic: Fix potential deadlock when ap_list is long
Marc Zyngier (2):
kallsyms: Don't let kallsyms_lookup_size_offset() fail on retrieving the first symbol
KVM: arm/arm64: vgic-v2: Handle SGI bits in GICD_I{S,C}PENDR0 as WI
kernel/kallsyms.c | 6 ++++--
virt/kvm/arm/vgic/vgic-mmio.c | 18 ++++++++++++++++++
virt/kvm/arm/vgic/vgic-v2.c | 5 ++++-
virt/kvm/arm/vgic/vgic-v3.c | 5 ++++-
virt/kvm/arm/vgic/vgic.c | 7 +++++++
5 files changed, 37 insertions(+), 4 deletions(-)
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^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [GIT PULL] arm64: Fixes for -rc7
2019-08-28 17:32 [GIT PULL] arm64: Fixes " Will Deacon
@ 2019-08-28 17:45 ` pr-tracker-bot
0 siblings, 0 replies; 25+ messages in thread
From: pr-tracker-bot @ 2019-08-28 17:45 UTC (permalink / raw)
To: Will Deacon
Cc: kvm, rkrcmar, marc.zyngier, catalin.marinas, linux-kernel,
pbonzini, torvalds, kvmarm, linux-arm-kernel
The pull request you sent on Wed, 28 Aug 2019 18:32:33 +0100:
> git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git tags/arm64-fixes
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/9cf6b756cdf2cd38b8b0dac2567f7c6daf5e79d5
Thank you!
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* [GIT PULL] arm64: fixes for -rc7
@ 2018-05-25 16:04 Will Deacon
0 siblings, 0 replies; 25+ messages in thread
From: Will Deacon @ 2018-05-25 16:04 UTC (permalink / raw)
To: linux-arm-kernel
Hi Linus,
Here are a few arm64 fixes for -rc7. The two main fixes are for the asm
constraints in our LSE atomics and for our pmd/pud setters when changing
permissions for kernel mappings. Summary in the tag.
Please pull,
Will
--->8
The following changes since commit 771c577c23bac90597c685971d7297ea00f99d11:
Linux 4.17-rc6 (2018-05-20 15:31:38 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git tags/arm64-fixes
for you to fetch changes up to 82034c23fcbc2389c73d97737f61fa2dd6526413:
arm64: Make sure permission updates happen for pmd/pud (2018-05-24 11:19:31 +0100)
----------------------------------------------------------------
More arm64 fixes:
- Fix application of read-only permissions to kernel section mappings
- Sanitise reported ESR values for signals delivered on a kernel address
- Ensure tishift GCC helpers are exported to modules
- Fix inline asm constraints for some LSE atomics
----------------------------------------------------------------
Jason A. Donenfeld (1):
arm64: export tishift functions to modules
Laura Abbott (1):
arm64: Make sure permission updates happen for pmd/pud
Peter Maydell (1):
arm64: fault: Don't leak data in ESR context for user fault on kernel VA
Will Deacon (1):
arm64: lse: Add early clobbers to some input/output asm operands
arch/arm64/include/asm/atomic_lse.h | 24 ++++++++---------
arch/arm64/kernel/arm64ksyms.c | 8 ++++++
arch/arm64/lib/tishift.S | 15 ++---------
arch/arm64/mm/fault.c | 51 +++++++++++++++++++++++++++++++++++++
arch/arm64/mm/mmu.c | 16 +++++++-----
5 files changed, 83 insertions(+), 31 deletions(-)
^ permalink raw reply [flat|nested] 25+ messages in thread
* [GIT PULL] arm64: fixes for -rc7
@ 2016-07-08 14:49 Will Deacon
0 siblings, 0 replies; 25+ messages in thread
From: Will Deacon @ 2016-07-08 14:49 UTC (permalink / raw)
To: linux-arm-kernel
Hi Linus,
A couple of late fixes here, but one that we've been sitting on for a
few weeks while the details were worked out. Specifically, we now
enforce USER_DS on taking exceptions whilst in the kernel, which avoids
leaking kernel data to userspace through things like perf. The other
patch is an update to a workaround for a hardware erratum on some Cavium
SoCs.
Please pull,
Will
--->8
The following changes since commit 4c2e07c6a29e0129e975727b9f57eede813eea85:
Linux 4.7-rc5 (2016-06-26 17:52:03 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git tags/arm64-fixes
for you to fetch changes up to 47c459beabe969c6751e2ea8d1f85c5fa1652d6c:
arm64: Enable workaround for Cavium erratum 27456 on thunderx-81xx (2016-07-07 18:35:21 +0100)
----------------------------------------------------------------
arm64 fixes:
- Enforce USER_DS on exception entry from EL1
- Apply workaround for Cavium errata #27456 on Thunderx-81xx parts
----------------------------------------------------------------
Ganapatrao Kulkarni (1):
arm64: Enable workaround for Cavium erratum 27456 on thunderx-81xx
James Morse (1):
arm64: kernel: Save and restore UAO and addr_limit on exception entry
arch/arm64/include/asm/cputype.h | 2 ++
arch/arm64/include/asm/ptrace.h | 2 ++
arch/arm64/kernel/asm-offsets.c | 1 +
arch/arm64/kernel/cpu_errata.c | 6 ++++++
arch/arm64/kernel/entry.S | 19 +++++++++++++++++--
arch/arm64/mm/fault.c | 3 ++-
6 files changed, 30 insertions(+), 3 deletions(-)
^ permalink raw reply [flat|nested] 25+ messages in thread
end of thread, other threads:[~2025-03-18 12:02 UTC | newest]
Thread overview: 25+ messages (download: mbox.gz follow: Atom feed
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2018-07-27 11:51 [GIT PULL] arm64: fixes for -rc7 Will Deacon
-- strict thread matches above, loose matches on Subject: below --
2025-03-14 16:04 [GIT PULL] arm64 " Will Deacon
2025-03-14 20:34 ` Linus Torvalds
2025-03-17 16:00 ` Will Deacon
2025-03-18 11:43 ` Will Deacon
2025-03-18 11:46 ` Marc Zyngier
2025-03-14 21:03 ` pr-tracker-bot
2024-11-08 11:57 Will Deacon
2024-11-08 17:39 ` pr-tracker-bot
2022-09-23 18:28 Will Deacon
2022-09-23 22:43 ` Linus Torvalds
2022-09-28 10:46 ` Mark Rutland
2022-09-23 22:53 ` pr-tracker-bot
2022-05-13 16:52 Will Deacon
2022-05-13 17:30 ` pr-tracker-bot
2021-08-20 8:53 Will Deacon
2021-08-20 20:09 ` pr-tracker-bot
2020-12-02 17:17 Will Deacon
2020-12-02 20:48 ` pr-tracker-bot
2020-03-20 15:35 Will Deacon
2020-03-20 17:15 ` pr-tracker-bot
2019-08-28 17:32 [GIT PULL] arm64: Fixes " Will Deacon
2019-08-28 17:45 ` pr-tracker-bot
2018-05-25 16:04 [GIT PULL] arm64: fixes " Will Deacon
2016-07-08 14:49 Will Deacon
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