[PATCH v3 00/19] arm64: dts: allwinner: A64 boards DT updates

[PATCH v3 00/19] arm64: dts: allwinner: A64 boards DT updates

[Andre Przywara]

Hi,

only smaller changes compared to v2, addressing the comments on the
ML. This fixes Ethernet for the Nano Pi A64 and removes the DT nodes
for the non-existent BT part of this board. Also some fixes for the
OrangePi as requested by Maxime.

Please note:
I am leaving for a three weeks holiday in a few hours, so won't be
able to respond or work on this.
Maxime, if you feel like you want to merge some parts, feel free to pick
some patches and/or make adjustments. Otherwise I will be picking this
up once I am back end of August.

Cheers,
Andre.

-----------------------------------------
While starring at some DTs while copying the kernel DTs into the U-Boot
tree, I realised that some boards seem to get more love than others.
Fix up some issues I found by inspection on some boards:
Patch 1 adds L2 cache nodes, to avoid a message on the boot console.
Patch 2 adds a separate DT file for the Pine64-LTS board, which from the
software point of view is very much a SOPine + baseboard.
Patch 3 till 12 fix various Orange Pi Win issues, which Samuel posted
before [1]. According to Maxime's comment and with Samuel's permission,
I split them up and integrated them here.
There were reports from people about the Olinuxino board having issues,
so patches 13-15 attempt to fix them.
The NanoPi-A64 also hasn't been updated in a while: enable the Ethernet
and the WiFi/Bluetooth chip, fix a voltage issue and add the LED in the
last four patches.

I don't have the OrangePi, Olinuxino or NanoPi-A64, so can't test these
boards. So even though I have carefully checked the changes against the
available schematics, I would really love to see some testing and
confirmation from owners of these systems.

[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2018-May/576897.html

Changelog v2..v3:
- fix NanoPi A64 Ethernet PHY address
- remove BT nodes from NanoPi A64
- amend voltage regulator names for OPi-Win
- more precise commit messages for OPi-Win
- add preliminary serdev BT node

Changelog v1..v2:
- add Samuel's Orange Pi Win series (split up)
- add Martin's Tested-by: for the DRAM voltage fix
- add supply property and alias for Olinuxino Ethernet
- fix Olinuxino USB supply issues (AXP VBus, id_det GPIO, bus 0/1 mix-up)
- drop NanoPi-A64 PortE voltage change (clashes with CSI pins)
- fix NanoPi-A64 WiFi node (better node name, no compatible string)

Andre Przywara (10):
  arm64: dts: allwinner: a64: Add L2 cache nodes
  arm64: dts: allwinner: a64: Add Pine64-LTS device tree file
  arm64: dts: allwinner: a64: Orange Pi Win: Add serdev BT node
  arm64: dts: allwinner: a64: Olinuxino: fix DRAM voltage
  arm64: dts: allwinner: a64: Olinuxino: add Ethernet nodes
  arm64: dts: allwinner: a64: Olinuxino: enable USB
  arm64: dts: allwinner: a64: NanoPi-A64: Fix DCDC1 voltage
  arm64: dts: allwinner: a64: NanoPi-A64: Add Ethernet
  arm64: dts: allwinner: a64: NanoPi-A64: Add Wifi chip
  arm64: dts: allwinner: a64: NanoPi-A64: Add blue status LED

Samuel Holland (9):
  arm64: dts: allwinner: a64: Orange Pi Win: Fix SD card node
  arm64: dts: allwinner: a64: Orange Pi Win: Enable USB hub regulator
  arm64: dts: allwinner: a64: Orange Pi Win: Enable USB OTG socket
  arm64: dts: allwinner: a64: Orange Pi Win: Add Ethernet node
  arm64: dts: allwinner: a64: Orange Pi Win: Add UARTs
  arm64: dts: allwinner: a64: Orange Pi Win: Add LED node
  arm64: dts: allwinner: a64: Orange Pi Win: Add SDIO node
  arm64: dts: allwinner: a64: Orange Pi Win: Add SPI flash node
  arm64: dts: allwinner: a64: Orange Pi Win: Adjust CSI power rails

 arch/arm64/boot/dts/allwinner/Makefile             |   1 +
 .../boot/dts/allwinner/sun50i-a64-nanopi-a64.dts   |  55 ++++++++-
 .../boot/dts/allwinner/sun50i-a64-olinuxino.dts    |  70 ++++++++++-
 .../boot/dts/allwinner/sun50i-a64-orangepi-win.dts | 136 ++++++++++++++++++++-
 .../boot/dts/allwinner/sun50i-a64-pine64-lts.dts   |  13 ++
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi      |   9 ++
 6 files changed, 274 insertions(+), 10 deletions(-)
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts

-- 
2.14.4

[PATCH v3 01/19] arm64: dts: allwinner: a64: Add L2 cache nodes

[Andre Przywara]

Current kernels complain when booting on an A64 Soc:
....
[    1.904297] cacheinfo: Unable to detect cache hierarchy for CPU 0
....
Not a real biggie on this flat topology, but also easy enough to fix.

Add the L2 cache node and let each CPU point to it.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index d3daf90a8715..934d7e87fa08 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -88,6 +88,7 @@
 			device_type = "cpu";
 			reg = <0>;
 			enable-method = "psci";
+			next-level-cache = <&L2>;
 		};
 
 		cpu1: cpu at 1 {
@@ -95,6 +96,7 @@
 			device_type = "cpu";
 			reg = <1>;
 			enable-method = "psci";
+			next-level-cache = <&L2>;
 		};
 
 		cpu2: cpu at 2 {
@@ -102,6 +104,7 @@
 			device_type = "cpu";
 			reg = <2>;
 			enable-method = "psci";
+			next-level-cache = <&L2>;
 		};
 
 		cpu3: cpu at 3 {
@@ -109,6 +112,12 @@
 			device_type = "cpu";
 			reg = <3>;
 			enable-method = "psci";
+			next-level-cache = <&L2>;
+		};
+
+		L2: l2-cache {
+			compatible = "cache";
+			cache-level = <2>;
 		};
 	};
 
-- 
2.14.4

[PATCH v3 02/19] arm64: dts: allwinner: a64: Add Pine64-LTS device tree file

[Andre Przywara]

The Pine64-LTS is a variant of the Pine64 board, from the software
visible side resembling a SoPine module on a baseboard, though the
board has the SoC and DRAM integrated on one PCB.
Due to this it basically shares the DT with the SoPine baseboard, which
we mimic in our DT by inclucing the boardboard .dts into the new file,
just overwriting the model name.
Having a separate .dts for this seems useful, since we don't know yet if
there are subtle differences between the two. Also the SoC on the LTS
board is technically an "R18" instead of the original "A64", although as
far as we know this is just a relabelled version of the original SoC.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/allwinner/Makefile                  |  1 +
 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts | 13 +++++++++++++
 2 files changed, 14 insertions(+)
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts

diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 9ffa7a038791..b7034327b28b 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-bananapi-m64.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-nanopi-a64.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-orangepi-win.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-lts.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinebook.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts
new file mode 100644
index 000000000000..72d6961dc312
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts
@@ -0,0 +1,13 @@
+/*
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ *
+ * Copyright (c) 2018 ARM Ltd.
+ */
+
+#include "sun50i-a64-sopine-baseboard.dts"
+
+/ {
+	model = "Pine64 LTS";
+	compatible = "pine64,pine64-lts", "allwinner,sun50i-r18",
+		     "allwinner,sun50i-a64";
+};
-- 
2.14.4

[PATCH v3 03/19] arm64: dts: allwinner: a64: Orange Pi Win: Fix SD card node

[Andre Przywara]

From: Samuel Holland <samuel@sholland.org>

The Orange Pi Win has a microSD card slot which is connected via all
four SD data lines. As the DT was not mentioning this fact, we got the
default single bit transfers, losing out on performance.
Also, as microSD does not have a write protect switch, we disable this
feature in the DT node.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
index 1221764f5719..667016815cf3 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
@@ -67,7 +67,9 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&mmc0_pins>;
 	vmmc-supply = <&reg_dcdc1>;
-	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
+	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+	disable-wp;
+	bus-width = <4>;
 	status = "okay";
 };
 
-- 
2.14.4

[PATCH v3 04/19] arm64: dts: allwinner: a64: Orange Pi Win: Enable USB hub regulator

[Andre Przywara]

From: Samuel Holland <samuel@sholland.org>

The Orange Pi Win has four standard USB-A sockets, connected to an
on-board USB hub. The hub's and socket's power regulators are enabled by
GPIO PD7.

Add the regulator to the DT to enable the power supply.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
index 667016815cf3..a73489850d88 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
@@ -57,6 +57,17 @@
 	chosen {
 		stdout-path = "serial0:115200n8";
 	};
+
+	reg_usb1_vbus: usb1-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb1-vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+		enable-active-high;
+		gpio = <&pio 3 7 GPIO_ACTIVE_HIGH>; /* PD7 */
+		status = "okay";
+	};
 };
 
 &ehci1 {
@@ -204,6 +215,7 @@
 };
 
 &usbphy {
+	usb1_vbus-supply = <&reg_usb1_vbus>;
 	status = "okay";
 };
 
-- 
2.14.4

[PATCH v3 05/19] arm64: dts: allwinner: a64: Orange Pi Win: Enable USB OTG socket

[Andre Przywara]

From: Samuel Holland <samuel@sholland.org>

The Orange Pi Win has a micro USB-B socket, connected to the SoC's
USB-OTG port. Its power is supplied by the AXP PMIC, and the ID pin is
connected to GPIO PH9. It can serve both as a host or a client port.

Add the respective DT node to enable it.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
index a73489850d88..c9cabe987c19 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
@@ -214,8 +214,13 @@
 	status = "okay";
 };
 
+&usb_otg {
+	dr_mode = "otg";
+	status = "okay";
+};
+
 &usbphy {
+	usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
 	usb1_vbus-supply = <&reg_usb1_vbus>;
 	status = "okay";
 };
-
-- 
2.14.4

[PATCH v3 05/19] arm64: dts: allwinner: a64: Orange Pi Win: Enable USB OTG socket

[Chen-Yu Tsai]

On Mon, Jul 30, 2018 at 8:31 PM, Andre Przywara <andre.przywara@arm.com> wrote:
> From: Samuel Holland <samuel@sholland.org>
>
> The Orange Pi Win has a micro USB-B socket, connected to the SoC's
> USB-OTG port. Its power is supplied by the AXP PMIC, and the ID pin is
> connected to GPIO PH9. It can serve both as a host or a client port.
>
> Add the respective DT node to enable it.

This patch is missing vbus detection and vbus-supply for usb0.

The former uses the PMIC's own VBUS detection.

The latter, according to the schematics, is a separate fixed regulator
controlled by the PMIC's N_VBUSEN pin, so it would correspond to the
PMIC's drive_vbus regulator node. Also the commit description is wrong.


ChenYu

> Signed-off-by: Samuel Holland <samuel@sholland.org>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
> index a73489850d88..c9cabe987c19 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
> @@ -214,8 +214,13 @@
>         status = "okay";
>  };
>
> +&usb_otg {
> +       dr_mode = "otg";
> +       status = "okay";
> +};
> +
>  &usbphy {
> +       usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
>         usb1_vbus-supply = <&reg_usb1_vbus>;
>         status = "okay";
>  };
> -
> --
> 2.14.4
>

[PATCH v3 05/19] arm64: dts: allwinner: a64: Orange Pi Win: Enable USB OTG socket

[Chen-Yu Tsai]

On Tue, Aug 7, 2018 at 1:04 PM, Chen-Yu Tsai <wens@csie.org> wrote:
> On Mon, Jul 30, 2018 at 8:31 PM, Andre Przywara <andre.przywara@arm.com> wrote:
>> From: Samuel Holland <samuel@sholland.org>
>>
>> The Orange Pi Win has a micro USB-B socket, connected to the SoC's
>> USB-OTG port. Its power is supplied by the AXP PMIC, and the ID pin is
>> connected to GPIO PH9. It can serve both as a host or a client port.
>>
>> Add the respective DT node to enable it.
>
> This patch is missing vbus detection and vbus-supply for usb0.
>
> The former uses the PMIC's own VBUS detection.
>
> The latter, according to the schematics, is a separate fixed regulator
> controlled by the PMIC's N_VBUSEN pin, so it would correspond to the
> PMIC's drive_vbus regulator node. Also the commit description is wrong.

Applied with ehci0 and ohci0 also enabled, since the A64 has a dual
routed USB0. Also added vbus-supply supply. The patch (and others) will
appear in

    https://git.kernel.org/pub/scm/linux/kernel/git/wens/linux.git/log/?h=sunxi/dt64-for-4.20

once the mirror completely syncs up. I'm not using the sunxi repo to
ease rebasing when the next -rc1 comes out. I.e. I will queue up
patches in a separate place so Maxime can rebase the ones he queued
up without having to fix up committer info on the ones I did.

ChenYu

[PATCH v3 06/19] arm64: dts: allwinner: a64: Orange Pi Win: Add Ethernet node

[Andre Przywara]

From: Samuel Holland <samuel@sholland.org>

The Orange Pi Win has the usual Gigabit PHY connected to the EMAC.
Its power is controlled by GPIO PD14.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 .../boot/dts/allwinner/sun50i-a64-orangepi-win.dts | 29 ++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
index c9cabe987c19..0cadcd59edd9 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
@@ -1,5 +1,6 @@
 /*
  * Copyright (C) 2017 Jagan Teki <jteki@openedev.com>
+ * Copyright (C) 2017-2018 Samuel Holland <samuel@sholland.org>
  *
  * This file is dual-licensed: you can use it either under the terms
  * of the GPL or the X11 license, at your option. Note that this dual
@@ -51,6 +52,7 @@
 	compatible = "xunlong,orangepi-win", "allwinner,sun50i-a64";
 
 	aliases {
+		ethernet0 = &emac;
 		serial0 = &uart0;
 	};
 
@@ -58,6 +60,17 @@
 		stdout-path = "serial0:115200n8";
 	};
 
+	reg_gmac_3v3: gmac-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "gmac-3v3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		enable-active-high;
+		gpio = <&pio 3 14 GPIO_ACTIVE_HIGH>; /* PD14 */
+		status = "okay";
+	};
+
 	reg_usb1_vbus: usb1-vbus {
 		compatible = "regulator-fixed";
 		regulator-name = "usb1-vbus";
@@ -74,6 +87,22 @@
 	status = "okay";
 };
 
+&emac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii_pins>;
+	phy-mode = "rgmii";
+	phy-handle = <&ext_rgmii_phy>;
+	phy-supply = <&reg_gmac_3v3>;
+	status = "okay";
+};
+
+&mdio {
+	ext_rgmii_phy: ethernet-phy at 1 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <1>;
+	};
+};
+
 &mmc0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mmc0_pins>;
-- 
2.14.4

[PATCH v3 07/19] arm64: dts: allwinner: a64: Orange Pi Win: Add UARTs

[Andre Przywara]

From: Samuel Holland <samuel@sholland.org>

The Orange Pi Win exposes several UARTs on header pins, and connects one
to the on-board WiFi/Bluetooth chip.

Add the pinmux definitions to the UART nodes, but keep them disabled.
Enable the UART1, which is wired to the Bluetooth chip, and add a serdev
node. There is no binding for the BT8723 yet, so leave this mostly empty
for now.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 .../boot/dts/allwinner/sun50i-a64-orangepi-win.dts | 33 ++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
index 0cadcd59edd9..e9a5640076ad 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
@@ -54,6 +54,10 @@
 	aliases {
 		ethernet0 = &emac;
 		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
+		serial3 = &uart3;
+		serial4 = &uart4;
 	};
 
 	chosen {
@@ -237,12 +241,41 @@
 	vcc-hdmi-supply = <&reg_dldo1>;
 };
 
+/* On debug connector */
 &uart0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart0_pins_a>;
 	status = "okay";
 };
 
+/* Bluetooth */
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+	status = "okay";
+};
+
+/* On Pi-2 connector, RTS/CTS optional */
+&uart2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart2_pins>;
+	status = "disabled";
+};
+
+/* On Pi-2 connector, RTS/CTS optional */
+&uart3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart3_pins>;
+	status = "disabled";
+};
+
+/* On Pi-2 connector (labeled for SPI1), RTS/CTS optional */
+&uart4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart4_pins>;
+	status = "disabled";
+};
+
 &usb_otg {
 	dr_mode = "otg";
 	status = "okay";
-- 
2.14.4

[PATCH v3 07/19] arm64: dts: allwinner: a64: Orange Pi Win: Add UARTs

[Chen-Yu Tsai]

On Mon, Jul 30, 2018 at 8:31 PM, Andre Przywara <andre.przywara@arm.com> wrote:
> From: Samuel Holland <samuel@sholland.org>
>
> The Orange Pi Win exposes several UARTs on header pins, and connects one
> to the on-board WiFi/Bluetooth chip.
>
> Add the pinmux definitions to the UART nodes, but keep them disabled.
> Enable the UART1, which is wired to the Bluetooth chip, and add a serdev
> node. There is no binding for the BT8723 yet, so leave this mostly empty
> for now.

The latter part regarding Bluetooth no longer applies. Queued with this
part removed.

ChenYu

>
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  .../boot/dts/allwinner/sun50i-a64-orangepi-win.dts | 33 ++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
> index 0cadcd59edd9..e9a5640076ad 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
> @@ -54,6 +54,10 @@
>         aliases {
>                 ethernet0 = &emac;
>                 serial0 = &uart0;
> +               serial1 = &uart1;
> +               serial2 = &uart2;
> +               serial3 = &uart3;
> +               serial4 = &uart4;
>         };
>
>         chosen {
> @@ -237,12 +241,41 @@
>         vcc-hdmi-supply = <&reg_dldo1>;
>  };
>
> +/* On debug connector */
>  &uart0 {
>         pinctrl-names = "default";
>         pinctrl-0 = <&uart0_pins_a>;
>         status = "okay";
>  };
>
> +/* Bluetooth */
> +&uart1 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
> +       status = "okay";
> +};
> +
> +/* On Pi-2 connector, RTS/CTS optional */
> +&uart2 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&uart2_pins>;
> +       status = "disabled";
> +};
> +
> +/* On Pi-2 connector, RTS/CTS optional */
> +&uart3 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&uart3_pins>;
> +       status = "disabled";
> +};
> +
> +/* On Pi-2 connector (labeled for SPI1), RTS/CTS optional */
> +&uart4 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&uart4_pins>;
> +       status = "disabled";
> +};
> +
>  &usb_otg {
>         dr_mode = "otg";
>         status = "okay";
> --
> 2.14.4
>

[PATCH v3 07/19] arm64: dts: allwinner: a64: Orange Pi Win: Add UARTs

[Chen-Yu Tsai]

On Tue, Aug 7, 2018 at 1:08 PM, Chen-Yu Tsai <wens@csie.org> wrote:
> On Mon, Jul 30, 2018 at 8:31 PM, Andre Przywara <andre.przywara@arm.com> wrote:
>> From: Samuel Holland <samuel@sholland.org>
>>
>> The Orange Pi Win exposes several UARTs on header pins, and connects one
>> to the on-board WiFi/Bluetooth chip.
>>
>> Add the pinmux definitions to the UART nodes, but keep them disabled.
>> Enable the UART1, which is wired to the Bluetooth chip, and add a serdev
>> node. There is no binding for the BT8723 yet, so leave this mostly empty
>> for now.
>
> The latter part regarding Bluetooth no longer applies. Queued with this
> part removed.

Misread the patch. It still applies, so applied as is.

ChenYu

[PATCH v3 08/19] arm64: dts: allwinner: a64: Orange Pi Win: Add serdev BT node

[Andre Przywara]

The Orange Pi Win has the RTL8723BS WiFi/Bluetooth chip soldered on the
board, with the Bluetooth part connected to UART1.

At the moment there is no mainline driver for the BT part yet, although
there is one in development. However as this does not include a DT binding,
we just go with an empty stub for now to denote that the BT chip is on
that UART. This can later be filled with the right properties.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
index e9a5640076ad..87c32635085b 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
@@ -253,6 +253,9 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
 	status = "okay";
+
+	rtl8723bs-bt {
+	};
 };
 
 /* On Pi-2 connector, RTS/CTS optional */
-- 
2.14.4

[PATCH v3 08/19] arm64: dts: allwinner: a64: Orange Pi Win: Add serdev BT node

[Maxime Ripard]

On Mon, Jul 30, 2018 at 01:31:26PM +0100, Andre Przywara wrote:
> The Orange Pi Win has the RTL8723BS WiFi/Bluetooth chip soldered on the
> board, with the Bluetooth part connected to UART1.
> 
> At the moment there is no mainline driver for the BT part yet, although
> there is one in development. However as this does not include a DT binding,
> we just go with an empty stub for now to denote that the BT chip is on
> that UART. This can later be filled with the right properties.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
> index e9a5640076ad..87c32635085b 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
> @@ -253,6 +253,9 @@
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
>  	status = "okay";
> +
> +	rtl8723bs-bt {
> +	};

The unit name should be the class of the device, so bluetooth would a
better name. However, I'm not even sure this is relevant, and that we
should merge this patch. It doesn't provide any info that isn't
already there.

Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

[PATCH v3 09/19] arm64: dts: allwinner: a64: Orange Pi Win: Add LED node

[Andre Przywara]

From: Samuel Holland <samuel@sholland.org>

The Orange Pi Win has a green status LED, add the DT node for it.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
index 87c32635085b..8e2b8ab9e149 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
@@ -64,6 +64,15 @@
 		stdout-path = "serial0:115200n8";
 	};
 
+	leds {
+		compatible = "gpio-leds";
+
+		status {
+			label = "orangepi:green:status";
+			gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */
+		};
+	};
+
 	reg_gmac_3v3: gmac-3v3 {
 		compatible = "regulator-fixed";
 		regulator-name = "gmac-3v3";
-- 
2.14.4

[PATCH v3 10/19] arm64: dts: allwinner: a64: Orange Pi Win: Add SDIO node

[Andre Przywara]

From: Samuel Holland <samuel@sholland.org>

The Orange Pi Win features a soldered WiFi chip on the board, connected
via the SDIO interface. Add the required DT nodes.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 .../arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
index 8e2b8ab9e149..1cb4d3611c6c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
@@ -94,6 +94,11 @@
 		gpio = <&pio 3 7 GPIO_ACTIVE_HIGH>; /* PD7 */
 		status = "okay";
 	};
+
+	wifi_pwrseq: wifi_pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>; /* PL8 */
+	};
 };
 
 &ehci1 {
@@ -126,6 +131,17 @@
 	status = "okay";
 };
 
+&mmc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc1_pins>;
+	vmmc-supply = <&reg_dldo2>;
+	vqmmc-supply = <&reg_dldo4>;
+	mmc-pwrseq = <&wifi_pwrseq>;
+	bus-width = <4>;
+	non-removable;
+	status = "okay";
+};
+
 &ohci1 {
 	status = "okay";
 };
-- 
2.14.4

[PATCH v3 11/19] arm64: dts: allwinner: a64: Orange Pi Win: Add SPI flash node

[Andre Przywara]

From: Samuel Holland <samuel@sholland.org>

The Orange Pi Win comes with 2 MB SPI flash, add the node.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
index 1cb4d3611c6c..3f9c5c8b0264 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
@@ -266,6 +266,18 @@
 	vcc-hdmi-supply = <&reg_dldo1>;
 };
 
+&spi0 {
+	status = "okay";
+
+	spi-flash at 0 {
+		compatible = "mxicy,mx25l1606e", "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <80000000>;
+		m25p,fast-read;
+		status = "okay";
+	};
+};
+
 /* On debug connector */
 &uart0 {
 	pinctrl-names = "default";
-- 
2.14.4

[PATCH v3 12/19] arm64: dts: allwinner: a64: Orange Pi Win: Adjust CSI power rails

[Andre Przywara]

From: Samuel Holland <samuel@sholland.org>

The Orange Pi Win board uses the AXP's ALDO1 power rail to drive the
VCC-CSI line, which, according to the schematic, needs to be set to 2.8V.

Also the ELDO3 power rail is connected to the CSI, with somewhat unclear
voltage requirements. Add this regulator and allow the voltage to be set
between 1.5V and 1.8V, which are the voltages mentioned in the
schematic.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
index 3f9c5c8b0264..63812576449f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
@@ -160,9 +160,8 @@
 #include "axp803.dtsi"
 
 &reg_aldo1 {
-	regulator-always-on;
-	regulator-min-microvolt = <1800000>;
-	regulator-max-microvolt = <3300000>;
+	regulator-min-microvolt = <2800000>;
+	regulator-max-microvolt = <2800000>;
 	regulator-name = "afvcc-csi";
 };
 
@@ -240,6 +239,12 @@
 	regulator-name = "cpvdd";
 };
 
+&reg_eldo3 {
+	regulator-min-microvolt = <1500000>;
+	regulator-max-microvolt = <1800000>;
+	regulator-name = "dvdd-csi";
+};
+
 &reg_fldo1 {
 	regulator-min-microvolt = <1200000>;
 	regulator-max-microvolt = <1200000>;
-- 
2.14.4

[PATCH v3 13/19] arm64: dts: allwinner: a64: Olinuxino: fix DRAM voltage

[Andre Przywara]

The Olinuxino board uses DDR3L chips which are supposed to be driven
with 1.35V. The reset default of the AXP is properly set to 1.36V.

While technically the chips can also run at 1.5 volts, changing the
voltage on the fly while booting Linux is asking for trouble. Also
running at a lower voltage saves power.

So fix the DCDC5 value to match the actual board design.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Martin Lucina <martin@lucina.net>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
index 3f531393eaee..b3f186434f36 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
@@ -142,10 +142,14 @@
 
 /* DCDC3 is polyphased with DCDC2 */
 
+/*
+ * The board uses DDR3L DRAM chips. 1.36V is the closest to the nominal
+ * 1.35V that the PMIC can drive.
+ */
 &reg_dcdc5 {
 	regulator-always-on;
-	regulator-min-microvolt = <1500000>;
-	regulator-max-microvolt = <1500000>;
+	regulator-min-microvolt = <1360000>;
+	regulator-max-microvolt = <1360000>;
 	regulator-name = "vcc-ddr3";
 };
 
-- 
2.14.4

[PATCH v3 14/19] arm64: dts: allwinner: a64: Olinuxino: add Ethernet nodes

[Andre Przywara]

Add the DT nodes required to enable the Gigabit Ethernet on the board.
The PHY is powered by the always-on power rail VDD_SYS_3.3V (DCDC1).

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
index b3f186434f36..26075b9a76e3 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
@@ -51,6 +51,7 @@
 	compatible = "olimex,a64-olinuxino", "allwinner,sun50i-a64";
 
 	aliases {
+		ethernet0 = &emac;
 		serial0 = &uart0;
 	};
 
@@ -64,6 +65,22 @@
 	};
 };
 
+&emac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii_pins>;
+	phy-mode = "rgmii";
+	phy-handle = <&ext_rgmii_phy>;
+	phy-supply = <&reg_dcdc1>;
+	status = "okay";
+};
+
+&mdio {
+	ext_rgmii_phy: ethernet-phy at 1 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <1>;
+	};
+};
+
 &mmc0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mmc0_pins>;
-- 
2.14.4

[PATCH v3 15/19] arm64: dts: allwinner: a64: Olinuxino: enable USB

[Andre Przywara]

The Olinuxino has two USB sockets:
USB0 is connected to a micro B socket. As it has the ID pin wired and
the VBUS line connected to the PMIC, we describe it as a proper OTG socket,
which switches between host and device automatically.
USB1 is connected to a normal USB A socket. PG9 enables the power line,
so add the required regulator as well.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 .../boot/dts/allwinner/sun50i-a64-olinuxino.dts    | 45 ++++++++++++++++++++++
 1 file changed, 45 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
index 26075b9a76e3..a1c2f06ed474 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
@@ -59,12 +59,31 @@
 		stdout-path = "serial0:115200n8";
 	};
 
+	reg_usb1_vbus: usb1-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb1-vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+		enable-active-high;
+		gpio = <&pio 6 9 GPIO_ACTIVE_HIGH>; /* PG9 */
+		status = "okay";
+	};
+
 	wifi_pwrseq: wifi_pwrseq {
 		compatible = "mmc-pwrseq-simple";
 		reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
 	};
 };
 
+&ehci0 {
+	status = "okay";
+};
+
+&ehci1 {
+	status = "okay";
+};
+
 &emac {
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii_pins>;
@@ -109,6 +128,14 @@
 	};
 };
 
+&ohci0 {
+	status = "okay";
+};
+
+&ohci1 {
+	status = "okay";
+};
+
 &r_rsb {
 	status = "okay";
 
@@ -117,6 +144,7 @@
 		reg = <0x3a3>;
 		interrupt-parent = <&r_intc>;
 		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+		x-powers,drive-vbus-en;	/* set N_VBUSEN as output pin */
 	};
 };
 
@@ -201,6 +229,11 @@
 	regulator-name = "vcc-wifi-io";
 };
 
+&reg_drivevbus {
+	regulator-name = "usb0-vbus";
+	status = "okay";
+};
+
 &reg_eldo1 {
 	regulator-min-microvolt = <1800000>;
 	regulator-max-microvolt = <1800000>;
@@ -244,3 +277,15 @@
 	pinctrl-0 = <&uart0_pins_a>;
 	status = "okay";
 };
+
+&usb_otg {
+	dr_mode = "otg";
+	status = "okay";
+};
+
+&usbphy {
+	status = "okay";
+	usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
+	usb0_vbus-supply = <&reg_drivevbus>;
+	usb1_vbus-supply = <&reg_usb1_vbus>;
+};
-- 
2.14.4

[PATCH v3 16/19] arm64: dts: allwinner: a64: NanoPi-A64: Fix DCDC1 voltage

[Andre Przywara]

According to the NanoPi-A64 schematics, DCDC1 is connected to a voltage
rail named "VDD_SYS_3.3V". All users seem to expect 3.3V here: the
Ethernet PHY, the uSD card slot, the camera interface and the GPIO pins
on the headers.
Fix up the voltage on the regulator to lift it up to 3.3V.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
index 98dbff19f5cc..5caba225b4f7 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
@@ -125,9 +125,9 @@
 
 &reg_dcdc1 {
 	regulator-always-on;
-	regulator-min-microvolt = <3000000>;
-	regulator-max-microvolt = <3000000>;
-	regulator-name = "vcc-3v";
+	regulator-min-microvolt = <3300000>;
+	regulator-max-microvolt = <3300000>;
+	regulator-name = "vcc-3v3";
 };
 
 &reg_dcdc2 {
-- 
2.14.4

[PATCH v3 17/19] arm64: dts: allwinner: a64: NanoPi-A64: Add Ethernet

[Andre Przywara]

The NanoPi-A64 has the usual Realtek Gbit PHY connected to the EMAC,
so add the respective nodes to the DT. The PHY is powered by the
VDD_SYS_3.3V line, which is always on.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
index 5caba225b4f7..1eba1324e5b9 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
@@ -51,6 +51,7 @@
 	compatible = "friendlyarm,nanopi-a64", "allwinner,sun50i-a64";
 
 	aliases {
+		ethernet0 = &emac;
 		serial0 = &uart0;
 	};
 
@@ -67,6 +68,15 @@
 	status = "okay";
 };
 
+&emac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii_pins>;
+	phy-mode = "rgmii";
+	phy-handle = <&ext_rgmii_phy>;
+	phy-supply = <&reg_dcdc1>;
+	status = "okay";
+};
+
 /* i2c1 connected with gpio headers like pine64, bananapi */
 &i2c1 {
 	pinctrl-names = "default";
@@ -78,6 +88,13 @@
 	bias-pull-up;
 };
 
+&mdio {
+	ext_rgmii_phy: ethernet-phy at 1 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <7>;
+	};
+};
+
 &mmc0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mmc0_pins>;
-- 
2.14.4

[PATCH v3 18/19] arm64: dts: allwinner: a64: NanoPi-A64: Add Wifi chip

[Andre Przywara]

The NanoPi-A64 has an on-board WiFi chip, connected to the usual MMC1 SDIO
interface. The AXP power line is the always-on VDD_SYS_3.3V, but it uses
pin L2 to enable the regulator.
As the actual WiFi driver is not in mainline Linux, it doesn't have a
compatible string, so we omit this from the node.

Add the respective nodes to the DT to make it usable.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 .../boot/dts/allwinner/sun50i-a64-nanopi-a64.dts   | 23 ++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
index 1eba1324e5b9..5e3dc2666d0f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
@@ -58,6 +58,11 @@
 	chosen {
 		stdout-path = "serial0:115200n8";
 	};
+
+	wifi_pwrseq: wifi_pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
+	};
 };
 
 &ehci0 {
@@ -105,6 +110,24 @@
 	status = "okay";
 };
 
+&mmc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc1_pins>;
+	vmmc-supply = <&reg_dcdc1>;
+	vqmmc-supply = <&reg_dldo4>;
+	mmc-pwrseq = <&wifi_pwrseq>;
+	bus-width = <4>;
+	non-removable;
+	status = "okay";
+
+	rtl8189etv: wifi at 1 {
+		reg = <1>;
+		interrupt-parent = <&r_pio>;
+		interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */
+		interrupt-names = "host-wake";
+	};
+};
+
 &ohci0 {
 	status = "okay";
 };
-- 
2.14.4

[PATCH v3 18/19] arm64: dts: allwinner: a64: NanoPi-A64: Add Wifi chip

[Chen-Yu Tsai]

On Mon, Jul 30, 2018 at 8:31 PM, Andre Przywara <andre.przywara@arm.com> wrote:
> The NanoPi-A64 has an on-board WiFi chip, connected to the usual MMC1 SDIO
> interface. The AXP power line is the always-on VDD_SYS_3.3V, but it uses
> pin L2 to enable the regulator.
> As the actual WiFi driver is not in mainline Linux, it doesn't have a
> compatible string, so we omit this from the node.
>
> Add the respective nodes to the DT to make it usable.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  .../boot/dts/allwinner/sun50i-a64-nanopi-a64.dts   | 23 ++++++++++++++++++++++
>  1 file changed, 23 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
> index 1eba1324e5b9..5e3dc2666d0f 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
> @@ -58,6 +58,11 @@
>         chosen {
>                 stdout-path = "serial0:115200n8";
>         };
> +
> +       wifi_pwrseq: wifi_pwrseq {
> +               compatible = "mmc-pwrseq-simple";

The schmatics also show the LPO pin hooked up to the RTC's 32k clock output.
I added this part when applying.

ChenYu

> +               reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
> +       };
>  };
>
>  &ehci0 {
> @@ -105,6 +110,24 @@
>         status = "okay";
>  };
>
> +&mmc1 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&mmc1_pins>;
> +       vmmc-supply = <&reg_dcdc1>;
> +       vqmmc-supply = <&reg_dldo4>;
> +       mmc-pwrseq = <&wifi_pwrseq>;
> +       bus-width = <4>;
> +       non-removable;
> +       status = "okay";
> +
> +       rtl8189etv: wifi at 1 {
> +               reg = <1>;
> +               interrupt-parent = <&r_pio>;
> +               interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */
> +               interrupt-names = "host-wake";
> +       };
> +};
> +
>  &ohci0 {
>         status = "okay";
>  };
> --
> 2.14.4
>

[PATCH v3 19/19] arm64: dts: allwinner: a64: NanoPi-A64: Add blue status LED

[Andre Przywara]

Beside the non-controllable green power LED, the NanoPi-A64 features a
blue "status" LED, connected to PD24.

Add the device tree node to make it usable.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
index 5e3dc2666d0f..feb8c7e51623 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
@@ -59,6 +59,15 @@
 		stdout-path = "serial0:115200n8";
 	};
 
+	leds {
+		compatible = "gpio-leds";
+
+		blue {
+			label = "nanopi-a64:blue:status";
+			gpios = <&pio 3 24 GPIO_ACTIVE_LOW>; /* PD24 */
+		};
+	};
+
 	wifi_pwrseq: wifi_pwrseq {
 		compatible = "mmc-pwrseq-simple";
 		reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
-- 
2.14.4

[PATCH v3 00/19] arm64: dts: allwinner: A64 boards DT updates

[Maxime Ripard]

On Mon, Jul 30, 2018 at 01:31:18PM +0100, Andre Przywara wrote:
> Hi,
> 
> only smaller changes compared to v2, addressing the comments on the
> ML. This fixes Ethernet for the Nano Pi A64 and removes the DT nodes
> for the non-existent BT part of this board. Also some fixes for the
> OrangePi as requested by Maxime.
> 
> Please note:
> I am leaving for a three weeks holiday in a few hours, so won't be
> able to respond or work on this.
> Maxime, if you feel like you want to merge some parts, feel free to pick
> some patches and/or make adjustments. Otherwise I will be picking this
> up once I am back end of August.

Apart from the serdev patch,
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>

Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

[PATCH v3 00/19] arm64: dts: allwinner: A64 boards DT updates

[Chen-Yu Tsai]

On Tue, Jul 31, 2018 at 8:30 PM, Maxime Ripard
<maxime.ripard@bootlin.com> wrote:
> On Mon, Jul 30, 2018 at 01:31:18PM +0100, Andre Przywara wrote:
>> Hi,
>>
>> only smaller changes compared to v2, addressing the comments on the
>> ML. This fixes Ethernet for the Nano Pi A64 and removes the DT nodes
>> for the non-existent BT part of this board. Also some fixes for the
>> OrangePi as requested by Maxime.
>>
>> Please note:
>> I am leaving for a three weeks holiday in a few hours, so won't be
>> able to respond or work on this.
>> Maxime, if you feel like you want to merge some parts, feel free to pick
>> some patches and/or make adjustments. Otherwise I will be picking this
>> up once I am back end of August.
>
> Apart from the serdev patch,
> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>

I queued up all patches except the serdev patch for 4.20.

I did a few fix ups, notably to the "Orange Pi Win USB OTG" and "NanoPi-A64
WiFi" patches. Please check the result here:

    https://git.kernel.org/pub/scm/linux/kernel/git/wens/linux.git/log/?h=sunxi/dt64-for-4.20

ChenYu