From: christoffer.dall@arm.com (Christoffer Dall)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH 12/16] KVM: arm64/sve: Context switch the SVE registers
Date: Mon, 6 Aug 2018 15:19:10 +0200 [thread overview]
Message-ID: <20180806131910.GC5985@e113682-lin.lund.arm.com> (raw)
In-Reply-To: <1529593060-542-13-git-send-email-Dave.Martin@arm.com>
On Thu, Jun 21, 2018 at 03:57:36PM +0100, Dave Martin wrote:
> In order to give each vcpu its own view of the SVE registers, this
> patch adds context storage via a new sve_state pointer in struct
> vcpu_arch. An additional member sve_max_vl is also added for each
> vcpu, to determine the maximum vector length visible to the guest
> and thus the value to be configured in ZCR_EL2.LEN while the is
> active. This also determines the layout and size of the storage in
> sve_state, which is read and written by the same backend functions
> that are used for context-switching the SVE state for host tasks.
>
> On SVE-enabled vcpus, SVE access traps are now handled by switching
> in the vcpu's SVE context and disabling the trap before returning
> to the guest. On other vcpus, the trap is not handled and an exit
> back to the host occurs, where the handle_sve() fallback path
> reflects an undefined instruction exception back to the guest,
> consistently with the behaviour of non-SVE-capable hardware (as was
> done unconditionally prior to this patch).
>
> No SVE handling is added on non-VHE-only paths, since VHE is an
> architectural and Kconfig prerequisite of SVE.
>
> Signed-off-by: Dave Martin <Dave.Martin@arm.com>
> ---
> arch/arm64/include/asm/kvm_host.h | 2 ++
> arch/arm64/kvm/fpsimd.c | 5 +++--
> arch/arm64/kvm/hyp/switch.c | 43 ++++++++++++++++++++++++++++++---------
> 3 files changed, 38 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
> index f331abf..d2084ae 100644
> --- a/arch/arm64/include/asm/kvm_host.h
> +++ b/arch/arm64/include/asm/kvm_host.h
> @@ -211,6 +211,8 @@ typedef struct kvm_cpu_context kvm_cpu_context_t;
>
> struct kvm_vcpu_arch {
> struct kvm_cpu_context ctxt;
> + void *sve_state;
> + unsigned int sve_max_vl;
>
> /* HYP configuration */
> u64 hcr_el2;
> diff --git a/arch/arm64/kvm/fpsimd.c b/arch/arm64/kvm/fpsimd.c
> index 872008c..44cf783 100644
> --- a/arch/arm64/kvm/fpsimd.c
> +++ b/arch/arm64/kvm/fpsimd.c
> @@ -86,10 +86,11 @@ void kvm_arch_vcpu_ctxsync_fp(struct kvm_vcpu *vcpu)
>
> if (vcpu->arch.flags & KVM_ARM64_FP_ENABLED) {
> fpsimd_bind_state_to_cpu(&vcpu->arch.ctxt.gp_regs.fp_regs,
> - NULL, sve_max_vl);
> + vcpu->arch.sve_state,
> + vcpu->arch.sve_max_vl);
>
> clear_thread_flag(TIF_FOREIGN_FPSTATE);
> - clear_thread_flag(TIF_SVE);
> + update_thread_flag(TIF_SVE, vcpu_has_sve(&vcpu->arch));
> }
> }
>
> diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c
> index d496ef5..98df5c1 100644
> --- a/arch/arm64/kvm/hyp/switch.c
> +++ b/arch/arm64/kvm/hyp/switch.c
> @@ -98,8 +98,13 @@ static void activate_traps_vhe(struct kvm_vcpu *vcpu)
> val = read_sysreg(cpacr_el1);
> val |= CPACR_EL1_TTA;
> val &= ~CPACR_EL1_ZEN;
> - if (!update_fp_enabled(vcpu))
> +
> + if (update_fp_enabled(vcpu)) {
> + if (vcpu_has_sve(&vcpu->arch))
> + val |= CPACR_EL1_ZEN;
> + } else {
> val &= ~CPACR_EL1_FPEN;
> + }
>
> write_sysreg(val, cpacr_el1);
>
> @@ -114,6 +119,7 @@ static void __hyp_text __activate_traps_nvhe(struct kvm_vcpu *vcpu)
>
> val = CPTR_EL2_DEFAULT;
> val |= CPTR_EL2_TTA | CPTR_EL2_TZ;
> +
> if (!update_fp_enabled(vcpu))
> val |= CPTR_EL2_TFP;
>
> @@ -329,16 +335,22 @@ static bool __hyp_text __skip_instr(struct kvm_vcpu *vcpu)
> }
> }
>
> -static bool __hyp_text __hyp_switch_fpsimd(struct kvm_vcpu *vcpu)
> +static bool __hyp_text __hyp_switch_fpsimd(struct kvm_vcpu *vcpu,
> + bool guest_has_sve)
> {
> struct user_fpsimd_state *host_fpsimd = vcpu->arch.host_fpsimd_state;
>
> - if (has_vhe())
> - write_sysreg(read_sysreg(cpacr_el1) | CPACR_EL1_FPEN,
> - cpacr_el1);
> - else
> + if (has_vhe()) {
> + u64 reg = read_sysreg(cpacr_el1) | CPACR_EL1_FPEN;
> +
> + if (system_supports_sve() && guest_has_sve)
> + reg |= CPACR_EL1_ZEN;
> +
> + write_sysreg(reg, cpacr_el1);
> + } else {
> write_sysreg(read_sysreg(cptr_el2) & ~(u64)CPTR_EL2_TFP,
> cptr_el2);
> + }
>
> isb();
>
> @@ -361,7 +373,13 @@ static bool __hyp_text __hyp_switch_fpsimd(struct kvm_vcpu *vcpu)
> vcpu->arch.flags &= ~KVM_ARM64_FP_HOST;
> }
>
> - __fpsimd_restore_state(&vcpu->arch.ctxt.gp_regs.fp_regs);
> + if (system_supports_sve() && guest_has_sve)
> + sve_load_state((char *)vcpu->arch.sve_state +
> + sve_ffr_offset(vcpu->arch.sve_max_vl),
nit: would it make sense to have a macro 'vcpu_get_sve_state_ptr(vcpu)'
to make this first argument more pretty?
> + &vcpu->arch.ctxt.gp_regs.fp_regs.fpsr,
> + sve_vq_from_vl(vcpu->arch.sve_max_vl) - 1);
> + else
> + __fpsimd_restore_state(&vcpu->arch.ctxt.gp_regs.fp_regs);
>
> /* Skip restoring fpexc32 for AArch64 guests */
> if (!(read_sysreg(hcr_el2) & HCR_RW))
> @@ -380,6 +398,8 @@ static bool __hyp_text __hyp_switch_fpsimd(struct kvm_vcpu *vcpu)
> */
> static bool __hyp_text fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code)
> {
> + bool guest_has_sve;
> +
> if (ARM_EXCEPTION_CODE(*exit_code) != ARM_EXCEPTION_IRQ)
> vcpu->arch.fault.esr_el2 = read_sysreg_el2(esr);
>
> @@ -397,10 +417,13 @@ static bool __hyp_text fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code)
> * and restore the guest context lazily.
> * If FP/SIMD is not implemented, handle the trap and inject an
> * undefined instruction exception to the guest.
> + * Similarly for trapped SVE accesses.
> */
> - if (system_supports_fpsimd() &&
> - kvm_vcpu_trap_get_class(vcpu) == ESR_ELx_EC_FP_ASIMD)
> - return __hyp_switch_fpsimd(vcpu);
> + guest_has_sve = vcpu_has_sve(&vcpu->arch);
> + if ((system_supports_fpsimd() &&
> + kvm_vcpu_trap_get_class(vcpu) == ESR_ELx_EC_FP_ASIMD) ||
> + (guest_has_sve && kvm_vcpu_trap_get_class(vcpu) == ESR_ELx_EC_SVE))
nit: this may also be folded nicely into a static bool
__trap_fpsimd_sve_access() check.
> + return __hyp_switch_fpsimd(vcpu, guest_has_sve);
>
> if (!__populate_fault_info(vcpu))
> return true;
> --
> 2.1.4
>
Thanks,
-Christoffer
next prev parent reply other threads:[~2018-08-06 13:19 UTC|newest]
Thread overview: 89+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-21 14:57 [RFC PATCH 00/16] KVM: arm64: Initial support for SVE guests Dave Martin
2018-06-21 14:57 ` [RFC PATCH 01/16] arm64: fpsimd: Always set TIF_FOREIGN_FPSTATE on task state flush Dave Martin
2018-07-06 9:07 ` Alex Bennée
2018-06-21 14:57 ` [RFC PATCH 02/16] KVM: arm64: Delete orphaned declaration for __fpsimd_enabled() Dave Martin
2018-07-06 9:08 ` Alex Bennée
2018-06-21 14:57 ` [RFC PATCH 03/16] KVM: arm64: Refactor kvm_arm_num_regs() for easier maintenance Dave Martin
2018-07-06 9:20 ` Alex Bennée
2018-06-21 14:57 ` [RFC PATCH 04/16] KVM: arm64: Add missing #include of <linux/bitmap.h> to kvm_host.h Dave Martin
2018-07-06 9:21 ` Alex Bennée
2018-06-21 14:57 ` [RFC PATCH 05/16] KVM: arm: Add arch init/uninit hooks Dave Martin
2018-07-06 10:02 ` Alex Bennée
2018-07-09 15:15 ` Dave Martin
2018-06-21 14:57 ` [RFC PATCH 06/16] arm64/sve: Determine virtualisation-friendly vector lengths Dave Martin
2018-07-06 13:20 ` Marc Zyngier
2018-06-21 14:57 ` [RFC PATCH 07/16] arm64/sve: Enable SVE state tracking for non-task contexts Dave Martin
2018-07-25 13:58 ` Alex Bennée
2018-07-25 14:39 ` Dave Martin
2018-06-21 14:57 ` [RFC PATCH 08/16] KVM: arm64: Support dynamically hideable system registers Dave Martin
2018-07-25 14:12 ` Alex Bennée
2018-07-25 14:36 ` Dave Martin
2018-07-25 15:41 ` Alex Bennée
2018-07-26 12:53 ` Dave Martin
2018-08-07 19:20 ` Christoffer Dall
2018-08-08 8:33 ` Dave Martin
2018-06-21 14:57 ` [RFC PATCH 09/16] KVM: arm64: Allow ID registers to by dynamically read-as-zero Dave Martin
2018-07-25 15:46 ` Alex Bennée
2018-08-06 13:03 ` Christoffer Dall
2018-08-07 11:09 ` Dave Martin
2018-08-07 19:35 ` Christoffer Dall
2018-08-08 9:11 ` Dave Martin
2018-08-08 9:58 ` Christoffer Dall
2018-08-08 14:03 ` Peter Maydell
2018-08-09 10:19 ` Dave Martin
2018-06-21 14:57 ` [RFC PATCH 10/16] KVM: arm64: Add a vcpu flag to control SVE visibility for the guest Dave Martin
2018-07-19 11:08 ` Andrew Jones
2018-07-25 11:41 ` Dave Martin
2018-07-25 13:43 ` Andrew Jones
2018-07-25 14:41 ` Dave Martin
2018-07-19 15:02 ` Andrew Jones
2018-07-25 11:48 ` Dave Martin
2018-06-21 14:57 ` [RFC PATCH 11/16] KVM: arm64/sve: System register context switch and access support Dave Martin
2018-07-19 11:11 ` Andrew Jones
2018-07-25 11:45 ` Dave Martin
2018-06-21 14:57 ` [RFC PATCH 12/16] KVM: arm64/sve: Context switch the SVE registers Dave Martin
2018-07-19 13:13 ` Andrew Jones
2018-07-25 11:50 ` Dave Martin
2018-07-25 13:57 ` Andrew Jones
2018-07-25 14:12 ` Dave Martin
2018-08-06 13:19 ` Christoffer Dall [this message]
2018-08-07 11:15 ` Dave Martin
2018-08-07 19:43 ` Christoffer Dall
2018-08-08 8:23 ` Dave Martin
2018-06-21 14:57 ` [RFC PATCH 13/16] KVM: Allow 2048-bit register access via KVM_{GET, SET}_ONE_REG Dave Martin
2018-07-25 15:58 ` Alex Bennée
2018-07-26 12:58 ` Dave Martin
2018-07-26 13:55 ` Alex Bennée
2018-07-27 9:26 ` Dave Martin
2018-06-21 14:57 ` [RFC PATCH 14/16] KVM: arm64/sve: Add SVE support to register access ioctl interface Dave Martin
2018-07-19 13:04 ` Andrew Jones
2018-07-25 14:06 ` Dave Martin
2018-07-25 17:20 ` Andrew Jones
2018-07-26 13:10 ` Dave Martin
2018-08-03 14:57 ` Dave Martin
2018-08-03 15:11 ` Andrew Jones
2018-08-03 15:38 ` Dave Martin
2018-08-06 13:25 ` Christoffer Dall
2018-08-07 11:17 ` Dave Martin
2018-06-21 14:57 ` [RFC PATCH 15/16] KVM: arm64: Enumerate SVE register indices for KVM_GET_REG_LIST Dave Martin
2018-07-19 14:12 ` Andrew Jones
2018-07-25 14:50 ` Dave Martin
2018-06-21 14:57 ` [RFC PATCH 16/16] KVM: arm64/sve: Report and enable SVE API extensions for userspace Dave Martin
2018-07-19 14:59 ` Andrew Jones
2018-07-25 15:27 ` Dave Martin
2018-07-25 16:52 ` Andrew Jones
2018-07-26 13:18 ` Dave Martin
2018-08-06 13:41 ` Christoffer Dall
2018-08-07 11:23 ` Dave Martin
2018-08-07 20:08 ` Christoffer Dall
2018-08-08 8:30 ` Dave Martin
2018-07-19 15:24 ` Andrew Jones
2018-07-26 13:23 ` Dave Martin
2018-07-06 8:22 ` [RFC PATCH 00/16] KVM: arm64: Initial support for SVE guests Alex Bennée
2018-07-06 9:05 ` Dave Martin
2018-07-06 9:20 ` Alex Bennée
2018-07-06 9:23 ` Peter Maydell
2018-07-06 10:11 ` Alex Bennée
2018-07-06 10:14 ` Peter Maydell
2018-08-06 13:05 ` Christoffer Dall
2018-08-07 11:18 ` Dave Martin
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