From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 1/4] KVM: arm64: Remove non-existent AArch32 ICC_SGI1R encoding
Date: Fri, 10 Aug 2018 11:14:19 +0100 [thread overview]
Message-ID: <20180810101422.3569-2-marc.zyngier@arm.com> (raw)
In-Reply-To: <20180810101422.3569-1-marc.zyngier@arm.com>
ICC_SGI1R is a 64bit system register, even on AArch32. It is thus
pointless to have such an encoding in the 32bit cp15 array. Let's
drop it.
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Acked-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm64/kvm/sys_regs.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 774d72155904..e04aacb2a24c 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -1622,8 +1622,6 @@ static const struct sys_reg_desc cp14_64_regs[] = {
* register).
*/
static const struct sys_reg_desc cp15_regs[] = {
- { Op1( 0), CRn( 0), CRm(12), Op2( 0), access_gic_sgi },
-
{ Op1( 0), CRn( 1), CRm( 0), Op2( 0), access_vm_reg, NULL, c1_SCTLR },
{ Op1( 0), CRn( 2), CRm( 0), Op2( 0), access_vm_reg, NULL, c2_TTBR0 },
{ Op1( 0), CRn( 2), CRm( 0), Op2( 1), access_vm_reg, NULL, c2_TTBR1 },
--
2.18.0
next prev parent reply other threads:[~2018-08-10 10:14 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-10 10:14 [PATCH v2 0/4] KVM: arm/arm64: vgic-v3: Group0 SGI support Marc Zyngier
2018-08-10 10:14 ` Marc Zyngier [this message]
2018-08-10 10:14 ` [PATCH v2 2/4] KVM: arm/arm64: vgic-v3: Add core support for Group0 SGIs Marc Zyngier
2018-08-11 16:22 ` Christoffer Dall
2018-08-10 10:14 ` [PATCH v2 3/4] KVM: arm64: vgic-v3: Add support for ICC_SGI0R_EL1 and ICC_ASGI1R_EL1 accesses Marc Zyngier
2018-08-10 10:14 ` [PATCH v2 4/4] KVM: arm: vgic-v3: Add support for ICC_SGI0R and ICC_ASGI1R accesses Marc Zyngier
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