From mboxrd@z Thu Jan 1 00:00:00 1970 From: jagan@amarulasolutions.com (Jagan Teki) Date: Fri, 26 Oct 2018 20:13:42 +0530 Subject: [PATCH v3 23/25] arm64: dts: allwinner: a64: Add DSI pipeline In-Reply-To: <20181026144344.27778-1-jagan@amarulasolutions.com> References: <20181026144344.27778-1-jagan@amarulasolutions.com> Message-ID: <20181026144344.27778-24-jagan@amarulasolutions.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org The A64 has a MIPI-DSI block which is similar to A31 without mod clock. So, add dsi node with A64 compatible, dphy node with A31 compatible and finally connect dsi to tcon0 to make proper DSI pipeline. Signed-off-by: Jagan Teki Tested-by: Jagan Teki --- Changes for v3: - add allwinner,tcon-channel property - add dsi nodes in ascending physical address Changes for v2: - use A64 dphy compatible arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 45 +++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index f3a66f888205..d6f269883759 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -320,6 +320,12 @@ #address-cells = <1>; #size-cells = <0>; reg = <1>; + + tcon0_out_dsi: endpoint at 1 { + reg = <1>; + remote-endpoint = <&dsi_in_tcon0>; + allwinner,tcon-channel = <1>; + }; }; }; }; @@ -829,6 +835,45 @@ status = "disabled"; }; + dsi: dsi at 1ca0000 { + compatible = "allwinner,sun50i-a64-mipi-dsi"; + reg = <0x01ca0000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_MIPI_DSI>; + clock-names = "bus"; + resets = <&ccu RST_BUS_MIPI_DSI>; + phys = <&dphy>; + phy-names = "dphy"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port at 0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + dsi_in_tcon0: endpoint { + remote-endpoint = <&tcon0_out_dsi>; + }; + }; + }; + }; + + dphy: d-phy at 1ca1000 { + compatible = "allwinner,sun50i-a64-mipi-dphy", + "allwinner,sun6i-a31-mipi-dphy"; + reg = <0x01ca1000 0x1000>; + clocks = <&ccu CLK_BUS_MIPI_DSI>, + <&ccu CLK_DSI_DPHY>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_MIPI_DSI>; + status = "disabled"; + #phy-cells = <0>; + }; + hdmi: hdmi at 1ee0000 { compatible = "allwinner,sun50i-a64-dw-hdmi", "allwinner,sun8i-a83t-dw-hdmi"; -- 2.18.0.321.gffc6fa0e3