From: geomatsi@gmail.com (Sergey Matyukevich)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] arm64: sysreg: fix sparse warnings
Date: Fri, 9 Nov 2018 23:47:47 +0300 [thread overview]
Message-ID: <20181109204747.10008-1-geomatsi@gmail.com> (raw)
Specify correct type for the constants to avoid
the following sparse complaints:
./arch/arm64/include/asm/sysreg.h:471:42: warning: constant 0xffffffffffffffff is so big it is unsigned long
./arch/arm64/include/asm/sysreg.h:512:42: warning: constant 0xffffffffffffffff is so big it is unsigned long
Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
---
arch/arm64/include/asm/sysreg.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 0c909c4a932f..e025aaa35178 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -468,7 +468,7 @@
SCTLR_ELx_SA | SCTLR_ELx_I | SCTLR_ELx_WXN | \
SCTLR_ELx_DSSBS | ENDIAN_CLEAR_EL2 | SCTLR_EL2_RES0)
-#if (SCTLR_EL2_SET ^ SCTLR_EL2_CLEAR) != 0xffffffffffffffff
+#if (SCTLR_EL2_SET ^ SCTLR_EL2_CLEAR) != 0xffffffffffffffffULL
#error "Inconsistent SCTLR_EL2 set/clear bits"
#endif
@@ -509,7 +509,7 @@
SCTLR_EL1_UMA | SCTLR_ELx_WXN | ENDIAN_CLEAR_EL1 |\
SCTLR_ELx_DSSBS | SCTLR_EL1_NTWI | SCTLR_EL1_RES0)
-#if (SCTLR_EL1_SET ^ SCTLR_EL1_CLEAR) != 0xffffffffffffffff
+#if (SCTLR_EL1_SET ^ SCTLR_EL1_CLEAR) != 0xffffffffffffffffULL
#error "Inconsistent SCTLR_EL1 set/clear bits"
#endif
--
2.11.0
next reply other threads:[~2018-11-09 20:47 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-09 20:47 Sergey Matyukevich [this message]
2018-11-10 0:16 ` [PATCH] arm64: sysreg: fix sparse warnings Will Deacon
2018-11-10 11:16 ` Sergey Matyukevich
2018-11-10 17:03 ` Will Deacon
2018-11-10 17:54 ` Luc Van Oostenryck
2018-11-12 16:32 ` Ramsay Jones
2018-11-14 22:25 ` Luc Van Oostenryck
2018-11-15 8:35 ` Sergey Matyukevich
2018-11-16 10:34 ` Luc Van Oostenryck
2018-11-16 13:54 ` Sergey Matyukevich
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