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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Nov 12, 2018 at 11:56:53AM +0000, Julien Thierry wrote: > It is not supported to have some CPUs using GICv3 sysreg CPU interface > while some others do not. > > Once ICC_SRE_EL1.SRE is set on a CPU, the bit cannot be cleared. Since > matching this feature require setting ICC_SRE_EL1.SRE, it cannot be > turned off if found on a CPU. > > Set the feature as STRICT_BOOT, if boot CPU has it, all other CPUs are > required to have it. > > Signed-off-by: Julien Thierry > Suggested-by: Daniel Thompson > Cc: Catalin Marinas > Cc: Will Deacon > Cc: Suzuki K Poulose > Cc: Marc Zyngier Acked-by: Catalin Marinas IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel