From: Maxime Ripard <maxime.ripard@bootlin.com>
To: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Cc: Daniel Vetter <daniel@ffwll.ch>, David Airlie <airlied@linux.ie>,
linux-sunxi@googlegroups.com,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
Chen-Yu Tsai <wens@csie.org>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Sean Paul <sean@poorly.run>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 12/21] drm/sun4i: Add buffer stride and offset configuration for tiling mode
Date: Tue, 4 Dec 2018 16:34:05 +0100 [thread overview]
Message-ID: <20181204153405.n5qvznkcrh7n3xej@flea> (raw)
In-Reply-To: <20181204142218.16284-13-paul.kocialkowski@bootlin.com>
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On Tue, Dec 04, 2018 at 03:22:09PM +0100, Paul Kocialkowski wrote:
> This introduces stride and offset configuration for the VPU tiling mode.
> Stride is calculated differently than it is for linear formats and an
> offset is calculated, for which new register definitions are introduced.
>
> Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
> ---
> drivers/gpu/drm/sun4i/sun4i_frontend.c | 60 ++++++++++++++++++++++++--
> drivers/gpu/drm/sun4i/sun4i_frontend.h | 8 ++++
> 2 files changed, 65 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.c b/drivers/gpu/drm/sun4i/sun4i_frontend.c
> index 3dcb05147e41..151b78d3c02e 100644
> --- a/drivers/gpu/drm/sun4i/sun4i_frontend.c
> +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.c
> @@ -125,21 +125,75 @@ void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend,
> {
> struct drm_plane_state *state = plane->state;
> struct drm_framebuffer *fb = state->fb;
> + unsigned int strides[3] = {};
> +
> dma_addr_t paddr;
> bool swap;
>
> + if (fb->modifier == DRM_FORMAT_MOD_ALLWINNER_TILED) {
> + unsigned int width = state->src_w >> 16;
> + unsigned int offset;
> +
> + /*
> + * In MB32 tiled mode, the stride is defined as the distance
> + * between the start of the end line of the current tile and
> + * the start of the first line in the next vertical tile.
> + *
> + * Tiles are represented in row-major order, thus the end line
> + * of current tile starts at: 31 * 32 (31 lines of 32 cols),
> + * the next vertical tile starts at: 32-bit-aligned-width * 32
> + * and the distance is: 32 * (32-bit-aligned-width - 31).
> + */
It'd be better if that comment was next to the macro definition where
the code is.
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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next prev parent reply other threads:[~2018-12-04 15:34 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-04 14:21 [PATCH v3 00/21] drm/sun4i: Support for linear and tiled YUV formats with the frontend Paul Kocialkowski
2018-12-04 14:21 ` [PATCH v3 01/21] drm/fourcc: Add format info helpers for checking YUV planes disposition Paul Kocialkowski
2018-12-04 14:21 ` [PATCH v3 02/21] drm/fourcc: Add format info helpers for checking YUV sub-sampling Paul Kocialkowski
2018-12-04 14:22 ` [PATCH v3 03/21] drm/sun4i: backend: Use explicit fourcc helpers for packed YUV422 check Paul Kocialkowski
2018-12-04 14:22 ` [PATCH v3 04/21] drm/sun4i: frontend: Pass DRM format info to input mode helper Paul Kocialkowski
2018-12-04 15:21 ` Maxime Ripard
2018-12-04 14:22 ` [PATCH v3 05/21] drm/sun4i: frontend: Determine input format based on colorspace Paul Kocialkowski
2018-12-04 14:22 ` [PATCH v3 06/21] drm/sun4i: frontend: Configure and enable YUV to RGB CSC when needed Paul Kocialkowski
2018-12-04 15:29 ` Maxime Ripard
2018-12-04 14:22 ` [PATCH v3 07/21] drm/sun4i: frontend: Add support for packed YUV422 input formats Paul Kocialkowski
2018-12-04 15:29 ` Maxime Ripard
2018-12-04 14:22 ` [PATCH v3 08/21] drm/sun4i: frontend: Add support for semi-planar YUV " Paul Kocialkowski
2018-12-04 15:30 ` Maxime Ripard
2018-12-04 14:22 ` [PATCH v3 09/21] drm/sun4i: frontend: Add support for planar " Paul Kocialkowski
2018-12-04 15:30 ` Maxime Ripard
2018-12-04 14:22 ` [PATCH v3 10/21] drm/fourcc: Add definitions for Allwinner vendor and VPU tiled format Paul Kocialkowski
2018-12-04 14:22 ` [PATCH v3 11/21] drm/sun4i: frontend: Add support for tiled YUV input mode configuration Paul Kocialkowski
2018-12-04 15:31 ` Maxime Ripard
2018-12-04 14:22 ` [PATCH v3 12/21] drm/sun4i: Add buffer stride and offset configuration for tiling mode Paul Kocialkowski
2018-12-04 15:34 ` Maxime Ripard [this message]
2018-12-04 14:22 ` [PATCH v3 13/21] drm/sun4i: frontend: Add and use helper for checking tiling support Paul Kocialkowski
2018-12-04 15:34 ` Maxime Ripard
2018-12-04 14:22 ` [PATCH v3 14/21] drm/sun4i: layer: Add tiled modifier support and helper Paul Kocialkowski
2018-12-04 15:34 ` Maxime Ripard
2018-12-04 14:22 ` [PATCH v3 15/21] drm/sun4i: drv: Allow framebuffer modifiers in mode config Paul Kocialkowski
2018-12-04 15:34 ` Maxime Ripard
2018-12-04 14:22 ` [PATCH v3 16/21] drm/sun4i: Move access control before setting the register as documented Paul Kocialkowski
2018-12-04 14:22 ` [PATCH v3 17/21] drm/sun4i: frontend: Add a quirk structure Paul Kocialkowski
2018-12-04 14:22 ` [PATCH v3 18/21] drm/sun4i: Set the coef_rdy bit right after the coef have been set Paul Kocialkowski
2018-12-04 14:22 ` [PATCH v3 19/21] drm/sun4i: Make COEF_RDY conditional Paul Kocialkowski
2018-12-04 14:22 ` [PATCH v3 20/21] drm/sun4i: frontend: Move the FIR filter phases to our quirks Paul Kocialkowski
2018-12-04 14:22 ` [PATCH v3 21/21] drm/sun4i: frontend: Add A20-specific device-tree compatible and quirks Paul Kocialkowski
2018-12-04 15:35 ` Maxime Ripard
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