From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Gregory Clement <gregory.clement@bootlin.com>,
Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
Zhang Rui <rui.zhang@intel.com>,
Eduardo Valentin <edubezval@gmail.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, linux-pm@vger.kernel.org,
Antoine Tenart <antoine.tenart@bootlin.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
Russell King <linux@armlinux.org.uk>,
Maxime Chevallier <maxime.chevallier@bootlin.com>,
Nadav Haklai <nadavh@marvell.com>,
Marc Zyngier <marc.zyngier@arm.com>,
David Sniatkiwicz <davidsn@marvell.com>,
Rob Herring <robh+dt@kernel.org>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 4/6] dt-bindings: cp110: document the thermal interrupt capabilities
Date: Tue, 4 Dec 2018 20:03:30 +0100 [thread overview]
Message-ID: <20181204190332.10351-5-miquel.raynal@bootlin.com> (raw)
In-Reply-To: <20181204190332.10351-1-miquel.raynal@bootlin.com>
The thermal IP can produce interrupts on overheat situation.
Describe them.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
.../bindings/arm/marvell/cp110-system-controller.txt | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt
index 81ce742d2760..4db4119a6d19 100644
--- a/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt
+++ b/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt
@@ -199,6 +199,9 @@ Thermal:
The thermal IP can probe the temperature all around the processor. It
may feature several channels, each of them wired to one sensor.
+It is possible to setup an overheat interrupt by giving at least one
+critical point to any subnode of the thermal-zone node.
+
For common binding part and usage, refer to
Documentation/devicetree/bindings/thermal/thermal.txt
@@ -208,6 +211,11 @@ Required properties:
- reg: register range associated with the thermal functions.
Optional properties:
+- interrupts-extended: overheat interrupt handle. Should point to
+ a line of the ICU-SEI irqchip (116 is what is usually used by the
+ firmware). The ICU-SEI will redirect towards interrupt line #37 of the
+ AP SEI which is shared across all CPs.
+ See interrupt-controller/interrupts.txt
- #thermal-sensor-cells: shall be <1> when thermal-zones subnodes refer
to this IP and represents the channel ID. There is one sensor per
channel. O refers to the thermal IP internal channel.
@@ -220,6 +228,7 @@ CP110_LABEL(syscon1): system-controller@6f8000 {
CP110_LABEL(thermal): thermal-sensor@70 {
compatible = "marvell,armada-cp110-thermal";
reg = <0x70 0x10>;
+ interrupts-extended = <&CP110_LABEL(icu_sei) 116 IRQ_TYPE_LEVEL_HIGH>;
#thermal-sensor-cells = <1>;
};
};
--
2.19.1
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next prev parent reply other threads:[~2018-12-04 19:04 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-04 19:03 [PATCH v3 0/6] Add hw overheat IRQ support to Marvell thermal driver Miquel Raynal
2018-12-04 19:03 ` [PATCH v3 1/6] thermal: armada: add overheat interrupt support Miquel Raynal
2018-12-04 19:03 ` [PATCH v3 2/6] MAINTAINERS: thermal: add entry for Marvell MVEBU thermal driver Miquel Raynal
2018-12-04 19:03 ` [PATCH v3 3/6] dt-bindings: ap806: document the thermal interrupt capabilities Miquel Raynal
2018-12-10 23:03 ` Rob Herring
2018-12-12 9:32 ` Miquel Raynal
2018-12-04 19:03 ` Miquel Raynal [this message]
2018-12-10 23:05 ` [PATCH v3 4/6] dt-bindings: cp110: " Rob Herring
2018-12-04 19:03 ` [PATCH v3 5/6] arm64: dts: marvell: add interrupt support to ap806 thermal node Miquel Raynal
2018-12-04 19:03 ` [PATCH v3 6/6] arm64: dts: marvell: add interrupt support to cp110 " Miquel Raynal
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