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Fri, 7 Dec 2018 02:08:35 -0600 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Fri, 7 Dec 2018 02:08:34 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Fri, 7 Dec 2018 02:08:34 -0600 Received: from a0230074-OptiPlex-7010.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id wB788Vud010977; Fri, 7 Dec 2018 02:08:31 -0600 From: Faiz Abbas To: , , , Subject: [PATCH v2 0/3] Add driver Support for MMCSD on AM654x Date: Fri, 7 Dec 2018 13:41:16 +0530 Message-ID: <20181207081119.29162-1-faiz_abbas@ti.com> X-Mailer: git-send-email 2.19.2 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181207_000855_800818_B9CB18EA X-CRM114-Status: GOOD ( 14.25 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, ulf.hansson@linaro.org, adrian.hunter@intel.com, kishon@ti.com, robh+dt@kernel.org, faiz_abbas@ti.com, michal.simek@xilinx.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org The following patches add driver support for MMCSD on TI's AM654 platforms. Previously I had added the support to sdhci-of-arasan driver with a separate phy driver[1]. Since then it has turned out that tuning operation (for HS200, HS400 and SDR104 speed modes) will require configuration of phy registers. This completely breaks the model of the sdhci-of-arasan driver which relies on a separate driver to configure the phy register space. Because of this, I am creating a new driver with both the sdhci and phy register spaces. This helps me use the phy registers in a future patch that adds tuning support. DT patches will be posted in a separate series. Changes in v2: 1. Reset OTAP delay back to default value in init. 2. Improved patch description for patch 2. 3. Minor style fixes. [1] driver and phy patches posted before https://patchwork.kernel.org/project/linux-mmc/list/?series=26623 Faiz Abbas (3): dt-bindings: mmc: sdhci-am654: Document bindings for the host controllers on TI's AM654 SOCs dt-bindings: mmc: sdhci-of-arasan: Add deprecated message for am65 mmc: sdhci_am654: Add Initial Support for AM654 SDHCI driver .../devicetree/bindings/mmc/arasan,sdhci.txt | 4 + .../devicetree/bindings/mmc/sdhci-am654.txt | 37 ++ drivers/mmc/host/Kconfig | 12 + drivers/mmc/host/Makefile | 1 + drivers/mmc/host/sdhci-of-arasan.c | 46 --- drivers/mmc/host/sdhci_am654.c | 381 ++++++++++++++++++ 6 files changed, 435 insertions(+), 46 deletions(-) create mode 100644 Documentation/devicetree/bindings/mmc/sdhci-am654.txt create mode 100644 drivers/mmc/host/sdhci_am654.c -- 2.19.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel