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Sat, 8 Dec 2018 09:45:27 -0600 Received: from DLEE110.ent.ti.com (157.170.170.21) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Sat, 8 Dec 2018 09:45:27 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Sat, 8 Dec 2018 09:45:27 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id wB8FjQRZ011911; Sat, 8 Dec 2018 09:45:26 -0600 Date: Sat, 8 Dec 2018 09:45:26 -0600 From: Nishanth Menon To: Vignesh R Subject: Re: [PATCH 1/2] arm64: dts: ti: k3-am654: Add Support for MMC/SD Message-ID: <20181208154526.ivbvwvcx6otg7lvh@akan> References: <20181207084233.13700-1-faiz_abbas@ti.com> <20181207084233.13700-2-faiz_abbas@ti.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20171215 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181208_074546_658562_6A9EA653 X-CRM114-Status: GOOD ( 17.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, ulf.hansson@linaro.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, adrian.hunter@intel.com, t-kristo@ti.com, Faiz Abbas , kishon@ti.com, michal.simek@xilinx.com, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 10:56-20181208, Vignesh R wrote: > > > On 07/12/18 2:12 PM, Faiz Abbas wrote: > > There are two MMC host controller instances present on the TI's > > Am654 SOCs. Add device tree nodes for the same. > > > > Signed-off-by: Faiz Abbas > > --- > > arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 28 ++++++++++++++++++++++++ > > 1 file changed, 28 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > > index 916434839603..d07212f16a81 100644 > > --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > > +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > > @@ -129,4 +129,32 @@ > > clocks = <&k3_clks 113 1>; > > power-domains = <&k3_pds 113>; > > }; > > + > > + sdhci0: sdhci@4f80000 { > > + compatible = "ti,am654-sdhci-5.1"; > > + reg = <0x0 0x4f80000 0x0 0x260>, <0x0 0x4f90000 0x0 0x134>; > > + power-domains = <&k3_pds 47>; > > + clocks = <&k3_clks 47 0>, <&k3_clks 47 1>; > > + clock-names = "clk_ahb", "clk_xin"; > > + interrupts = ; > > + sdhci-caps-mask = <0x80000007 0x0>; > > + mmc-ddr-1_8v; > > + ti,otap-del-sel = <0x2>; > > + ti,trm-icp = <0x8>; > > + status = "disabled"; > > + }; > > Please drop "status=disabled" from dtsi. Can be disabled as required in > the board dts. yes - the standard in k3 is to disable the nodes that are'nt needed in board.dtsi. This is different from "disabled by default" approach in DRA7 or OMAP4 for example. -- Regards, Nishanth Menon _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel