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* mvebu: how to determine the address of the internal register window
@ 2018-12-10 17:09 Uwe Kleine-König
  2018-12-11  9:37 ` Thomas Petazzoni
  0 siblings, 1 reply; 2+ messages in thread
From: Uwe Kleine-König @ 2018-12-10 17:09 UTC (permalink / raw)
  To: Jason Cooper, Andrew Lunn, Gregory Clement, Sebastian Hesselbarth
  Cc: kernel, linux-arm-kernel


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Hello,

using barebox on an mvebu machine the internal register window is moved
from 0xd0000000 to 0xf1000000. Compared to U-Boot the PCI Express BAR0
Internal Registers (on Armada 370: 0x40010 and 0x80010, on Armada XP a
few more) are not fixed which makes accessing pci devices fail. Instead
of letting barebox fix this up I'd like to make Linux ensure the
register is configured correctly.

I think the right place for that is mvebu_pcie_setup_wins which needs to do

	mvebu_writel(port, intregoffset, PCIE_BAR_LO_OFF(0));

I wonder however how I should determine the actual value to write here.
I didn't find a function that exports the offset of the internal
register window. Do you have a hint for me?

Best regards
Uwe


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^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: mvebu: how to determine the address of the internal register window
  2018-12-10 17:09 mvebu: how to determine the address of the internal register window Uwe Kleine-König
@ 2018-12-11  9:37 ` Thomas Petazzoni
  0 siblings, 0 replies; 2+ messages in thread
From: Thomas Petazzoni @ 2018-12-11  9:37 UTC (permalink / raw)
  To: Uwe Kleine-König
  Cc: Andrew Lunn, Jason Cooper, Gregory Clement, kernel,
	linux-arm-kernel, Sebastian Hesselbarth

Hello Uwe,

On Mon, 10 Dec 2018 18:09:38 +0100, Uwe Kleine-König wrote:

> using barebox on an mvebu machine the internal register window is moved
> from 0xd0000000 to 0xf1000000. Compared to U-Boot the PCI Express BAR0
> Internal Registers (on Armada 370: 0x40010 and 0x80010, on Armada XP a
> few more) are not fixed which makes accessing pci devices fail. Instead
> of letting barebox fix this up I'd like to make Linux ensure the
> register is configured correctly.
> 
> I think the right place for that is mvebu_pcie_setup_wins which needs to do
> 
> 	mvebu_writel(port, intregoffset, PCIE_BAR_LO_OFF(0));
> 
> I wonder however how I should determine the actual value to write here.
> I didn't find a function that exports the offset of the internal
> register window. Do you have a hint for me?

The base address of the internal registers is available in the Device
Tree:

        soc {
                ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000

See the 0xf1000000 here? That's the base address of the internal registers.

See also Documentation/devicetree/bindings/bus/mvebu-mbus.txt for more
details about this binding.

Alternatively, since the internal register window is always 1 MB large,
from the pci-mvebu driver, you can take the base address of any PCI
controller, do & ~0xFFFFF, and you get the base address of the internal
register window.

Does this helps?

Best regards

Thomas
-- 
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

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