From: Benjamin Gaignard <benjamin.gaignard@st.com>
To: <tglx@linutronix.de>, <jason@lakedaemon.net>,
<marc.zyngier@arm.com>, <robh+dt@kernel.org>,
<mark.rutland@arm.com>, <alexandre.torgue@st.com>
Cc: Benjamin Gaignard <benjamin.gaignard@st.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-stm32@st-md-mailman.stormreply.com
Subject: [PATCH v3 0/3] Make STM32 interrupt controller use hwspinlock
Date: Mon, 17 Dec 2018 15:22:12 +0100 [thread overview]
Message-ID: <20181217142215.17493-1-benjamin.gaignard@st.com> (raw)
This series allow to protect STM32 interrupt controller configuration registers
with a hwspinlock to avoid conflicting accesses between processors.
version 3:
- with bindings patch
version 2:
- rework hwspinlock locking sequence in stm32 irqchip to take care of the
cases where hwspinlock node is disabled or not yet probed
Benjamin Gaignard (3):
dt-bindings: interrupt-controller: stm32: Document hwlock properties
irqchip: stm32: protect configuration registers with hwspinlock
ARM: dts: stm32: Add hwlock for irqchip on stm32mp157
.../interrupt-controller/st,stm32-exti.txt | 4 +
arch/arm/boot/dts/stm32mp157c.dtsi | 1 +
drivers/irqchip/irq-stm32-exti.c | 116 ++++++++++++++++++---
3 files changed, 105 insertions(+), 16 deletions(-)
--
2.15.0
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next reply other threads:[~2018-12-17 14:23 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-17 14:22 Benjamin Gaignard [this message]
2018-12-17 14:22 ` [PATCH v3 1/3] dt-bindings: interrupt-controller: stm32: Document hwlock properties Benjamin Gaignard
2018-12-18 15:06 ` Rob Herring
2018-12-17 14:22 ` [PATCH v3 2/3] irqchip: stm32: protect configuration registers with hwspinlock Benjamin Gaignard
2018-12-17 14:22 ` [PATCH v3 3/3] ARM: dts: stm32: Add hwlock for irqchip on stm32mp157 Benjamin Gaignard
2018-12-29 18:30 ` kbuild test robot
2018-12-18 15:39 ` [PATCH v3 0/3] Make STM32 interrupt controller use hwspinlock Marc Zyngier
2018-12-19 15:00 ` Alexandre Torgue
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