From: Maxime Ripard <maxime.ripard@bootlin.com>
To: Jagan Teki <jagan@amarulasolutions.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org,
Michael Trimarchi <michael@amarulasolutions.com>,
linux-sunxi <linux-sunxi@googlegroups.com>,
linux-kernel@vger.kernel.org, Chen-Yu Tsai <wens@csie.org>,
Rob Herring <robh+dt@kernel.org>,
Yong Deng <yong.deng@magewell.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
linux-amarula@amarulasolutions.com,
linux-arm-kernel@lists.infradead.org,
linux-media@vger.kernel.org
Subject: Re: [PATCH v4 3/6] media: sun6i: Update default CSI_SCLK for A64
Date: Tue, 18 Dec 2018 16:23:18 +0100 [thread overview]
Message-ID: <20181218152318.duynff7f5m2gxtv4@flea> (raw)
In-Reply-To: <20181218113320.4856-4-jagan@amarulasolutions.com>
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On Tue, Dec 18, 2018 at 05:03:17PM +0530, Jagan Teki wrote:
> Unfortunately A64 CSI cannot work with default CSI_SCLK rate.
>
> A64 BSP is using 300MHz clock rate as default csi clock,
> so sun6i_csi require explicit change to update CSI_SCLK
> rate to 300MHZ for A64 SoC's.
>
> So, set the clk_mod to 300MHz only for A64.
>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
> drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c
> index 9ff61896e4bb..91470edf7581 100644
> --- a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c
> +++ b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c
> @@ -822,6 +822,11 @@ static int sun6i_csi_resource_request(struct sun6i_csi_dev *sdev,
> return PTR_ERR(sdev->clk_mod);
> }
>
> + /* A64 require 300MHz mod clock to operate properly */
> + if (of_device_is_compatible(pdev->dev.of_node,
> + "allwinner,sun50i-a64-csi"))
> + clk_set_rate_exclusive(sdev->clk_mod, 300000000);
> +
If you're using clk_set_rate_exclusive, you need to put back the
"exclusive" reference once you're not using the clock.
Doing it here is not really optimal either, since you'll put a
constraint on the system (maintaining that clock at 300MHz), while
it's not in use.
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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next prev parent reply other threads:[~2018-12-18 15:24 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-18 11:33 [PATCH v4 0/6] media/sun6i: Allwinner A64 CSI support Jagan Teki
2018-12-18 11:33 ` [PATCH v4 1/6] dt-bindings: media: sun6i: Add A64 CSI compatible Jagan Teki
2018-12-18 11:33 ` [PATCH v4 2/6] media: sun6i: Add A64 compatible support Jagan Teki
2018-12-18 11:33 ` [PATCH v4 3/6] media: sun6i: Update default CSI_SCLK for A64 Jagan Teki
2018-12-18 15:23 ` Maxime Ripard [this message]
2018-12-18 15:38 ` Jagan Teki
2018-12-19 10:07 ` Maxime Ripard
2018-12-19 10:42 ` Jagan Teki
2018-12-18 11:33 ` [PATCH v4 4/6] arm64: dts: allwinner: a64: Add A64 CSI controller Jagan Teki
2018-12-18 11:33 ` [PATCH v4 5/6] arm64: dts: allwinner: a64: Add pinmux setting for CSI MCLK on PE1 Jagan Teki
2018-12-18 11:33 ` [DO NOT MERGE] [PATCH v4 6/6] arm64: dts: allwinner: bananapi-m64: Add HDF5640 camera module Jagan Teki
2018-12-18 15:21 ` [PATCH v4 0/6] media/sun6i: Allwinner A64 CSI support Maxime Ripard
2018-12-18 15:28 ` Jagan Teki
2018-12-19 10:24 ` Maxime Ripard
2018-12-19 10:31 ` Michael Nazzareno Trimarchi
2018-12-19 10:41 ` Jagan Teki
2018-12-19 15:39 ` Maxime Ripard
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