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Wed, 19 Dec 2018 06:42:27 -0600 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Wed, 19 Dec 2018 06:42:27 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Wed, 19 Dec 2018 06:42:27 -0600 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id wBJCgNZj003940; Wed, 19 Dec 2018 06:42:24 -0600 From: Kishon Vijay Abraham I To: Murali Karicheri , Lorenzo Pieralisi , Gustavo Pimentel , Marc Zyngier Subject: [PATCH 00/10] PCI: DWC/Keystone: MSI configuration cleanup Date: Wed, 19 Dec 2018 18:11:57 +0530 Message-ID: <20181219124207.13479-1-kishon@ti.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181219_044243_251787_BC012B09 X-CRM114-Status: GOOD ( 17.29 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jingoo Han , linux-kernel@vger.kernel.org, kishon@ti.com, linux-pci@vger.kernel.org, Bjorn Helgaas , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org This series tries to address the comments discussed in [1] w.r.t removing Keystone specific callbacks defined in dw_pcie_host_ops. This series also tries to cleanup the Keystone interrupt handling part. This series is created on top of git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git pci/dwc-msi Tested on K2G (had to use out of tree SERDES patches). Also tested on dra7xx to make sure there are no regressions. [1] -> https://patchwork.kernel.org/patch/10681587/ Kishon Vijay Abraham I (10): PCI: keystone: Cleanup interrupt related macros PCI: keystone: Use "dummy_irq_chip" instead of new irqchip for legacy interrupt handling PCI: keystone: Modify legacy_irq_handler to check the IRQ_STATUS of INTA/B/C/D PCI: keystone: Add separate functions for configuring MSI and legacy interrupt PCI: keystone: Use hwirq to get the IRQ number offset PCI: keystone: Cleanup ks_pcie_msi_irq_handler and ks_pcie_legacy_irq_handler PCI: dwc: Add support to use non default msi_irq_chip PCI: keystone: Use Keystone specific msi_irq_chip PCI: dwc: Remove Keystone specific dw_pcie_host_ops PCI: dwc: Do not write to MSI control registers if the platform doesn't use it drivers/pci/controller/dwc/pci-keystone.c | 430 +++++++++--------- .../pci/controller/dwc/pcie-designware-host.c | 74 ++- drivers/pci/controller/dwc/pcie-designware.h | 6 +- 3 files changed, 258 insertions(+), 252 deletions(-) -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel