From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.5 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS, URIBL_BLOCKED,USER_AGENT_MUTT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1F5F8C43387 for ; Fri, 28 Dec 2018 22:04:41 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DB45E217F9 for ; Fri, 28 Dec 2018 22:04:40 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="jvxp/oJC" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DB45E217F9 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Vz1EJskJXWt3Cpv4VKqiOOZecVWCKv0BvZVLcgM4y6c=; b=jvxp/oJC5eRRSq nBzRHNZrKjvOP8KcY3aa043rwU20x9rXZZjfpwZ941g/1/qTiOOJxGGwD/l69BmHzwFCXP7NZleW5 JLUvkHXF14KBgz1kjSqHK01rxyBk4h8BzfqdTziR2aaZ1Oxjsb5dV+v5Ee+L8upD3xrgiAsqCqGZ7 R9RlMdxpGHOw+tM2TsX44tDpQdiiVNKsIwfcECFF0XXmejrFSCUlbV5NWjdVM0Qb1oSXZ474ja7/Q GtKluxNkbiOjtUrfgrd/pNhwYXBO7nHyOMWdv+IaFTHDPT4hr8TyIXSd+gkfP00A859WSH3bVVheJ ouosCD3kJ/S3eaKQ1Ljw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gd0F2-000635-AP; Fri, 28 Dec 2018 22:04:28 +0000 Received: from mail-it1-f196.google.com ([209.85.166.196]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gd0Eu-00061i-8s; Fri, 28 Dec 2018 22:04:22 +0000 Received: by mail-it1-f196.google.com with SMTP id g85so30018779ita.3; Fri, 28 Dec 2018 14:04:07 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=notmpdDYWSi2JCcn64Q/8o1c94650SqabPpHm6d37c8=; b=fUsb+ZXh23t11b5gqPe0JNHsmlcBGthTSvyqE16Bow0NHU2fLMM7d+7wflSDLu6wt+ d0wVksUPf8E4edECX66SuMfgznpLIXIP+TkZ6wAwBiq/EJMPTRPgVej88e3HjS7jw+sE Oz5gSRo0q8EMfPFqpOgkDv0ckkdPm2M84eQknK6V1dv4P9b33ZSejYnrG/LdtYWbRctX Z11wX/3ScD7K1XIqS/BFyAeeSX9BMI1gUjLy2pOHEIAOFJh+qNkNxj2z0VuStGuukLGD +pmpGxI3gDNglBOuzL7mL+Qd26eXRp8zpzdpELIrFFmkROnDtx+faPbWXwztIV00GksD mFaQ== X-Gm-Message-State: AA+aEWZnDm5fEeLp2J74e4eW3qaaImak9zXhOlutUl4Gm4/hy2UlvEXa zjt3oB6Cga5rB/zw6g5qQg== X-Google-Smtp-Source: AFSGD/V3XBAlTTF7/zPGtpLedkoM2pu2PX66XShQPXNsmTTIz+801eskBVfox6c+vZfvl0+8sdQlFQ== X-Received: by 2002:a24:ed4f:: with SMTP id r76mr17599014ith.17.1546034646772; Fri, 28 Dec 2018 14:04:06 -0800 (PST) Received: from localhost ([24.51.61.172]) by smtp.gmail.com with ESMTPSA id b188sm16853950itc.9.2018.12.28.14.04.05 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 28 Dec 2018 14:04:06 -0800 (PST) Date: Fri, 28 Dec 2018 16:04:05 -0600 From: Rob Herring To: Erin Lo Subject: Re: [PATCH v5 5/6] dt-bindings: pinctrl: mt8183: add binding document Message-ID: <20181228220405.GA8739@bogus> References: <1545984581-25843-1-git-send-email-erin.lo@mediatek.com> <1545984581-25843-6-git-send-email-erin.lo@mediatek.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1545984581-25843-6-git-send-email-erin.lo@mediatek.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181228_140420_318030_94E6E8BC X-CRM114-Status: GOOD ( 24.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Jason Cooper , srv_heupstream , Marc Zyngier , Greg Kroah-Hartman , mars.cheng@mediatek.com, Stephen Boyd , linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-serial@vger.kernel.org, Zhiyong Tao , Matthias Brugger , yingjoe.chen@mediatek.com, Thomas Gleixner , eddie.huang@mediatek.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Dec 28, 2018 at 04:09:40PM +0800, Erin Lo wrote: > From: Zhiyong Tao > > The commit adds mt8183 compatible node in binding document. > > Signed-off-by: Zhiyong Tao > Signed-off-by: Erin Lo > --- > .../devicetree/bindings/pinctrl/pinctrl-mt8183.txt | 110 +++++++++++++++++++++ > 1 file changed, 110 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl-mt8183.txt > > diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8183.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8183.txt > new file mode 100644 > index 0000000..7b5285e > --- /dev/null > +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8183.txt > @@ -0,0 +1,110 @@ > +* Mediatek MT8183 Pin Controller > + > +The Mediatek's Pin controller is used to control SoC pins. > + > +Required properties: > +- compatible: value should be one of the following. > + "mediatek,mt8183-pinctrl", compatible with mt8183 pinctrl. > +- gpio-controller : Marks the device node as a gpio controller. > +- #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO > + binding is used, the amount of cells must be specified as 2. See the below > + mentioned gpio binding representation for description of particular cells. > +- gpio-ranges : gpio valid number range. > + > + Eg: <&pio 6 0> > + <[phandle of the gpio controller node] > + [line number within the gpio controller] > + [flags]> > + > + Values for gpio specifier: > + - Line number: is a value between 0 to 202. > + - Flags: bit field of flags, as defined in . > + Only the following flags are supported: > + 0 - GPIO_ACTIVE_HIGH > + 1 - GPIO_ACTIVE_LOW > + > +Optional properties: > +- reg: physicall address base for gpio base registers. s/physicall/physical/ reg should never be optional. Need to say how many reg entries. > +- reg-names: gpio base registers name. Need to say what are the names. However, I don't find the names in the example all that useful, so I'd just drop it. > +- interrupt-controller: Marks the device node as an interrupt controller > +- #interrupt-cells: Should be two. > +- interrupts : The interrupt outputs from the controller. > + > +Please refer to pinctrl-bindings.txt in this directory for details of the > +common pinctrl bindings used by client devices. > + > +Subnode format > +A pinctrl node should contain at least one subnodes representing the > +pinctrl groups available on the machine. Each subnode will list the > +pins it needs, and how they should be configured, with regard to muxer > +configuration, pullups, drive strength, input enable/disable and input schmitt. > + > + node { > + pinmux = ; > + GENERIC_PINCONFIG; > + }; > + > +Required properties: > +- pinmux: integer array, represents gpio pin number and mux setting. > + Supported pin number and mux varies for different SoCs, and are defined > + as macros in boot/dts/-pinfunc.h directly. > + > +Optional properties: > +- GENERIC_PINCONFIG: is the generic pinconfig options to use, bias-disable, > + bias-pull-down, bias-pull-up, input-enable, input-disable, output-low, output-high, > + input-schmitt-enable, input-schmitt-disable and drive-strength are valid. > + > + Some special pins have extra pull up strength, there are R0 and R1 pull-up > + resistors available, but for user, it's only need to set R1R0 as 00, 01, 10 or 11. > + So when config mediatek,pull-up-adv or mediatek,pull-down-adv, > + it support arguments for those special pins. > + > + When config drive-strength, it can support some arguments, such as > + MTK_DRIVE_4mA, MTK_DRIVE_6mA, etc. See dt-bindings/pinctrl/mt65xx.h. > + > +Examples: > + > +#include "mt8183-pinfunc.h" > + > +... > +{ > + pio: pinctrl@10005000 { > + compatible = "mediatek,mt8183-pinctrl"; > + reg = <0 0x10005000 0 0x1000>, > + <0 0x11F20000 0 0x1000>, > + <0 0x11E80000 0 0x1000>, > + <0 0x11E70000 0 0x1000>, > + <0 0x11E90000 0 0x1000>, > + <0 0x11D30000 0 0x1000>, > + <0 0x11D20000 0 0x1000>, > + <0 0x11C50000 0 0x1000>, > + <0 0x11F30000 0 0x1000>; > + reg-names = "iocfg0", "iocfg1", "iocfg2", > + "iocfg3", "iocfg4", "iocfg5", > + "iocfg6", "iocfg7", "iocfg8"; > + gpio-controller; > + #gpio-cells = <2>; > + gpio-ranges = <&pio 0 0 192>; > + interrupt-controller; > + interrupts = ; > + interrupt-parent = <&gic>; > + #interrupt-cells = <2>; > + > + i2c0_pins_a: i2c0@0 { unit-address without reg property is not valid. > + pins1 { > + pinmux = , > + ; > + mediatek,pull-up-adv = <11>; > + }; > + }; > + > + i2c1_pins_a: i2c1@0 { > + pins { > + pinmux = , > + ; > + mediatek,pull-down-adv = <10>; > + }; > + }; > + ... > + }; > +}; > -- > 1.9.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel