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Tue, 15 Jan 2019 08:27:44 -0600 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Tue, 15 Jan 2019 08:27:43 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Tue, 15 Jan 2019 08:27:43 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id x0FERhrT028678; Tue, 15 Jan 2019 08:27:43 -0600 Date: Tue, 15 Jan 2019 08:27:11 -0600 From: Nishanth Menon To: Faiz Abbas Subject: Re: [PATCH v2 1/2] arm64: dts: ti: k3-am654: Add Support for MMC/SD Message-ID: <20190115142711.iwsx4p3gfa63dutc@kahuna> References: <20190110073355.3382-1-faiz_abbas@ti.com> <20190110073355.3382-2-faiz_abbas@ti.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20190110073355.3382-2-faiz_abbas@ti.com> User-Agent: NeoMutt/20171215 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190115_062749_999491_3E28BE77 X-CRM114-Status: GOOD ( 17.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, t-kristo@ti.com, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org $subject claims MMC/SD, while the patch is specific for emmc and HS200? could you fix that up please? On 13:03-20190110, Faiz Abbas wrote: > Add support for the Secure Digital Host Controller Interface (SDHCI) > present on TI's AM654 SOCs. It is compatible with eMMC5.1 Host > Specifications and SDHC Standard Specification 4.10. > > Enable only upto HS200 speed mode. > > Signed-off-by: Faiz Abbas > --- > arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > index 272cf8fc8d30..78e1bb56adee 100644 > --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > @@ -191,4 +191,17 @@ > #address-cells = <1>; > #size-cells = <0>; > }; > + > + sdhci0: sdhci@4f80000 { > + compatible = "ti,am654-sdhci-5.1"; > + reg = <0x0 0x4f80000 0x0 0x260>, <0x0 0x4f90000 0x0 0x134>; > + power-domains = <&k3_pds 47>; > + clocks = <&k3_clks 47 0>, <&k3_clks 47 1>; > + clock-names = "clk_ahb", "clk_xin"; > + interrupts = ; > + mmc-ddr-1_8v; > + mmc-hs200-1_8v; > + ti,otap-del-sel = <0x2>; > + ti,trm-icp = <0x8>; > + }; > }; > -- > 2.19.2 > -- Regards, Nishanth Menon _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel