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[188.175.152.238]) by smtp.gmail.com with ESMTPSA id y1sm71939131wme.1.2019.01.23.01.44.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 23 Jan 2019 01:44:25 -0800 (PST) From: Josef Lusticky To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/3] ARM: dts: sun5i: GR8: Add SPI2 PB pins Date: Wed, 23 Jan 2019 10:43:33 +0100 Message-Id: <20190123094334.11030-3-josef@lusticky.cz> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190123094334.11030-1-josef@lusticky.cz> References: <20190123094334.11030-1-josef@lusticky.cz> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190123_014431_681894_A50A38B7 X-CRM114-Status: GOOD ( 11.05 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: maxime.ripard@bootlin.com, wens@csie.org, Josef Lusticky Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add a separate pinctrl nodes for the SPI2 pins on the GR8 PB bank. Signed-off-by: Josef Lusticky --- arch/arm/boot/dts/sun5i-gr8.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/sun5i-gr8.dtsi b/arch/arm/boot/dts/sun5i-gr8.dtsi index 98a8fd5e89e8..a26a6a7d7c6b 100644 --- a/arch/arm/boot/dts/sun5i-gr8.dtsi +++ b/arch/arm/boot/dts/sun5i-gr8.dtsi @@ -119,6 +119,16 @@ bias-pull-up; }; + spi2_pb_pins: spi2-pb-pins { + pins = "PB12", "PB13", "PB14"; + function = "spi2"; + }; + + spi2_cs0_pb_pin: spi2-cs0-pb-pin { + pins = "PB11"; + function = "spi2"; + }; + uart1_cts_rts_pins: uart1-cts-rts-pins { pins = "PG5", "PG6"; function = "uart1"; -- 2.20.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel