From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.6 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS, USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD71FC282C5 for ; Thu, 24 Jan 2019 09:13:28 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8F5482184C for ; Thu, 24 Jan 2019 09:13:28 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="REFHbRUI" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8F5482184C Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=infradead.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=j03AljyT7Jk0aH5xuin9GLVP1CuDPQOcU5zobWrKDEM=; b=REFHbRUIvXSUzY 7x65gwH6fm8pGndnBcyRMKIulJ/IaNneBDmJW90xxGdO+H3lrsxGmjt6WfqTNqewvW2KIJRmUg+MO jvPu3K3B7bJk5/bKMTkpegC0LzXkmJ0docrAUmnXm+Nx79eMSyWBbAHvCByr6XlTZ6lZjlN4a4xdZ 87epO1IO7in/NMyEgFXduuoAzWNqZ8LyOjIv4/h19427TD19L0UTSJs5cwO3JHYhBSQ98eFZ08wo+ gPy61mmky6KN+uwwd7K3M5ZW4I9PE1STrpsykyAtOLMMnCqDGTGboUDX4QMGoo2NsfpqS2lvCdcYi A01+YucfYHideVY40wlQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gmb4a-0000RP-SB; Thu, 24 Jan 2019 09:13:20 +0000 Received: from hch by bombadil.infradead.org with local (Exim 4.90_1 #2 (Red Hat Linux)) id 1gmb4W-0000HG-CO; Thu, 24 Jan 2019 09:13:16 +0000 Date: Thu, 24 Jan 2019 01:13:16 -0800 From: Christoph Hellwig To: Ard Biesheuvel Subject: Re: [RFC PATCH] drm: disable WC optimization for cache coherent devices on non-x86 Message-ID: <20190124091316.GA22796@infradead.org> References: <850b6aee-0040-c333-b125-45211c18ada5@daenzer.net> <047667fd-17be-1c37-5d2a-26768cfd6ab8@daenzer.net> <20190123071521.GB20526@infradead.org> <20190123164428.GA9367@infradead.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.2 (2017-12-15) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Maxime Ripard , Michael Ellerman , Michel =?iso-8859-1?Q?D=E4nzer?= , Will Deacon , Linux Kernel Mailing List , amd-gfx list , Junwei Zhang , Christoph Hellwig , David Airlie , Huang Rui , dri-devel , Alex Deucher , Alex Deucher , Sean Paul , Christian Koenig , linux-arm-kernel Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Jan 23, 2019 at 05:52:50PM +0100, Ard Biesheuvel wrote: > But my concern is that it seems likely that non-cache coherent > implementations are relying on this hack as well. There must be a > reason that this hack is only disabled for PowerPC platforms if they > are cache coherent, for instance, and I suspect that that reason is > that the hack is the only thing ensuring that the CPU mapping > attributes match the device ones used for these buffers (the vmap()ed > ones), whereas the rings and other consistent data structures are > using the DMA API as intended, and thus getting uncached attributes in > the correct way. Dave, who added that commit is on Cc together with just about everyone involved in the review chain. Based on the previous explanation that idea what we might want an uncached mapping for some non-coherent architectures for this to work at all makes sense, but then again the way to create those mappings is entirely architecture specific, and also need a cache flushing before creating the mapping to work properly. So my working theory is that this code never properly worked on architectures without DMA coherent for PCIe at all, but I'd love to be corrected by concrete examples including an explanation of how it actually ends up working. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel